| Message ID | 20220307233940.4161-8-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Clean up some dpll stuff | expand |
On Tue, 08 Mar 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Set the bxt/glk DPLL min dotclock to 25MHz (HDMI minimum) > and the max to 594 MHz (HDMI max). The supported DP frequencies > (162MHz-540MHz) fit within the same range. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dpll.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c > index f4e5290b86a4..7377f1f009ba 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c > @@ -285,8 +285,7 @@ static const struct intel_limit intel_limits_chv = { > }; > > static const struct intel_limit intel_limits_bxt = { > - /* FIXME: find real dot limits */ > - .dot = { .min = 0, .max = INT_MAX }, > + .dot = { .min = 25000, .max = 594000 }, > .vco = { .min = 4800000, .max = 6700000 }, > .n = { .min = 1, .max = 1 }, > .m1 = { .min = 2, .max = 2 },
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index f4e5290b86a4..7377f1f009ba 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -285,8 +285,7 @@ static const struct intel_limit intel_limits_chv = { }; static const struct intel_limit intel_limits_bxt = { - /* FIXME: find real dot limits */ - .dot = { .min = 0, .max = INT_MAX }, + .dot = { .min = 25000, .max = 594000 }, .vco = { .min = 4800000, .max = 6700000 }, .n = { .min = 1, .max = 1 }, .m1 = { .min = 2, .max = 2 },