diff mbox series

[11/13] drm/i915: Enable eDP DRRS on ilk/snb port A

Message ID 20220310004802.16310-12-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: DRRS fixes/cleanups and start of static DRRS | expand

Commit Message

Ville Syrjälä March 10, 2022, 12:48 a.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Nothing special about ivb+ here, if DRRS works on ivb+ port A
it should work just as well on ilk/snb. So let's enable
that.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_drrs.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Jani Nikula March 10, 2022, 9:59 a.m. UTC | #1 
On Thu, 10 Mar 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Nothing special about ivb+ here, if DRRS works on ivb+ port A
> it should work just as well on ilk/snb. So let's enable
> that.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_drrs.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index 246dd0c71194..dcbbd9c48458 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -145,10 +145,10 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
>  	if (refresh_rate == crtc->drrs.refresh_rate)
>  		return;
>  
> -	if (DISPLAY_VER(dev_priv) >= 8 && !IS_CHERRYVIEW(dev_priv))
> -		intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
> -	else if (DISPLAY_VER(dev_priv) > 6)
> +	if (intel_cpu_transcoder_has_m2_n2(dev_priv, crtc->drrs.cpu_transcoder))
>  		intel_drrs_set_refresh_rate_pipeconf(crtc, refresh_rate);
> +	else
> +		intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
>  
>  	crtc->drrs.refresh_rate = refresh_rate;
>  }
> @@ -364,7 +364,7 @@ intel_drrs_init(struct intel_connector *connector,
>  	struct intel_encoder *encoder = connector->encoder;
>  	struct drm_display_mode *downclock_mode;
>  
> -	if (DISPLAY_VER(dev_priv) <= 6) {
> +	if (DISPLAY_VER(dev_priv) < 5) {
>  		drm_dbg_kms(&dev_priv->drm,
>  			    "[CONNECTOR:%d:%s] DRRS not supported on platform\n",
>  			    connector->base.base.id, connector->base.name);
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 246dd0c71194..dcbbd9c48458 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -145,10 +145,10 @@  static void intel_drrs_set_state(struct intel_crtc *crtc,
 	if (refresh_rate == crtc->drrs.refresh_rate)
 		return;
 
-	if (DISPLAY_VER(dev_priv) >= 8 && !IS_CHERRYVIEW(dev_priv))
-		intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
-	else if (DISPLAY_VER(dev_priv) > 6)
+	if (intel_cpu_transcoder_has_m2_n2(dev_priv, crtc->drrs.cpu_transcoder))
 		intel_drrs_set_refresh_rate_pipeconf(crtc, refresh_rate);
+	else
+		intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
 
 	crtc->drrs.refresh_rate = refresh_rate;
 }
@@ -364,7 +364,7 @@  intel_drrs_init(struct intel_connector *connector,
 	struct intel_encoder *encoder = connector->encoder;
 	struct drm_display_mode *downclock_mode;
 
-	if (DISPLAY_VER(dev_priv) <= 6) {
+	if (DISPLAY_VER(dev_priv) < 5) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "[CONNECTOR:%d:%s] DRRS not supported on platform\n",
 			    connector->base.base.id, connector->base.name);