From patchwork Fri Mar 18 04:20:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 12784866 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A2B3C433F5 for ; Fri, 18 Mar 2022 04:20:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A1F9410EA58; Fri, 18 Mar 2022 04:20:42 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id CFE8210EA58 for ; Fri, 18 Mar 2022 04:20:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647577241; x=1679113241; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oUkrWnlJAvvYHsrAvQFYHVGx+PL7pK6wqf72VXDwLpw=; b=n+UBEao1wIdZGaI1vGRKMZ73WYoXlLmoJh5g33wbboovYrFcEUWN39ls iovEP2uVa0beSqGsKbaW6lr5GyNsKRg7URm2y4JkEnP37rWCXkW5WRLHU 2v/8bE3MlOagy/2ruibV75ApC6BD6QCyKZ/nNxa2+Gm+ShVn1wz/d0gEX 2DV6fc8EXFsvPmQ4j8CAxEYPJ87R9SlMx4WGg4CwXnGXI0A6JTWVY8tEO GKdhqE63BOZkCopbQCKiyKZqYrpCQH4SV/07bhgJeCD+gFK2HEbdgWnKi AjGzexvuLTXGZBwrY5ldo2EwD16Ry3x73hYNkm3vUSa1arB5/hmdqYC+i Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10289"; a="255870532" X-IronPort-AV: E=Sophos;i="5.90,191,1643702400"; d="scan'208";a="255870532" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2022 21:20:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,191,1643702400"; d="scan'208";a="691167341" Received: from kandpal.iind.intel.com ([10.190.239.32]) by fmsmga001.fm.intel.com with ESMTP; 17 Mar 2022 21:20:39 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org Date: Fri, 18 Mar 2022 09:50:11 +0530 Message-Id: <20220318042011.1398214-1-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220316093740.652925-3-suraj.kandpal@intel.com> References: <20220316093740.652925-3-suraj.kandpal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [RFC PATCH v2 2/3] drm/i915: Define WD trancoder for i915 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Adding WD Types, WD transcoder to enum list and WD Transcoder offsets Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.h | 6 ++++++ drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/i915_reg.h | 2 ++ 3 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 8513703086b7..8c93a5de8e07 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -119,6 +119,8 @@ enum transcoder { TRANSCODER_DSI_1, TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */ TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */ + TRANSCODER_WD_0, + TRANSCODER_WD_1, I915_MAX_TRANSCODERS }; @@ -140,6 +142,10 @@ static inline const char *transcoder_name(enum transcoder transcoder) return "DSI A"; case TRANSCODER_DSI_C: return "DSI C"; + case TRANSCODER_WD_0: + return "WD 0"; + case TRANSCODER_WD_1: + return "WD 1"; default: return ""; } diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 7a96ecba73c0..dcb4ad43cf88 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -79,6 +79,7 @@ enum intel_output_type { INTEL_OUTPUT_DSI = 9, INTEL_OUTPUT_DDI = 10, INTEL_OUTPUT_DP_MST = 11, + INTEL_OUTPUT_WD = 12, }; enum hdmi_force_audio { diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ddbc7a685a50..6396afd77209 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2023,6 +2023,8 @@ #define TRANSCODER_EDP_OFFSET 0x6f000 #define TRANSCODER_DSI0_OFFSET 0x6b000 #define TRANSCODER_DSI1_OFFSET 0x6b800 +#define TRANSCODER_WD0_OFFSET 0x6e000 +#define TRANSCODER_WD1_OFFSET 0x6e800 #define HTOTAL(trans) _MMIO_TRANS2(trans, _HTOTAL_A) #define HBLANK(trans) _MMIO_TRANS2(trans, _HBLANK_A)