| Message ID | 20220325123205.22140-6-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Start reordering modeset clock calculations | expand |
On Fri, 25 Mar 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Move some checks into intel_dpll_crtc_compute_clock() from the > caller. Avoids the caller from having to worry about all this > crap. > > We'll also reorder the hw.enable vs. shared_dpll checks since > it makes sense to sanity check that we've cleared out the > old shared_dpll even if the pipe is getting disabled. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 3 +-- > drivers/gpu/drm/i915/display/intel_dpll.c | 10 ++++++++++ > 2 files changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index bb1ababe4577..7c68bc07c925 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -4999,8 +4999,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, > mode_changed && !crtc_state->hw.active) > crtc_state->update_wm_post = true; > > - if (mode_changed && crtc_state->hw.enable && > - !drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) { > + if (mode_changed) { > ret = intel_dpll_crtc_compute_clock(state, crtc); > if (ret) > return ret; > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c > index 1c05ec167046..88d78a585304 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c > @@ -1419,6 +1419,16 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > struct drm_i915_private *i915 = to_i915(state->base.dev); > + struct intel_crtc_state *crtc_state = > + intel_atomic_get_new_crtc_state(state, crtc); > + > + drm_WARN_ON(&i915->drm, !intel_crtc_needs_modeset(crtc_state)); > + > + if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll)) > + return 0; > + > + if (!crtc_state->hw.enable) > + return 0; > > return i915->dpll_funcs->crtc_compute_clock(state, crtc); > }
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index bb1ababe4577..7c68bc07c925 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4999,8 +4999,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, mode_changed && !crtc_state->hw.active) crtc_state->update_wm_post = true; - if (mode_changed && crtc_state->hw.enable && - !drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll)) { + if (mode_changed) { ret = intel_dpll_crtc_compute_clock(state, crtc); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index 1c05ec167046..88d78a585304 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -1419,6 +1419,16 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state, struct intel_crtc *crtc) { struct drm_i915_private *i915 = to_i915(state->base.dev); + struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + + drm_WARN_ON(&i915->drm, !intel_crtc_needs_modeset(crtc_state)); + + if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll)) + return 0; + + if (!crtc_state->hw.enable) + return 0; return i915->dpll_funcs->crtc_compute_clock(state, crtc); }