| Message ID | 20220325123205.22140-8-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Start reordering modeset clock calculations | expand |
On Fri, 25 Mar 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Clear the dpll_hw_state when we're about disable the pipe. > Previously it looks like we just left the old junk in there. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dpll.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c > index 494a343850e7..7960f1d52eaa 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c > @@ -1406,12 +1406,12 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state, > if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll)) > return 0; > > - if (!crtc_state->hw.enable) > - return 0; > - > memset(&crtc_state->dpll_hw_state, 0, > sizeof(crtc_state->dpll_hw_state)); > > + if (!crtc_state->hw.enable) > + return 0; > + > return i915->dpll_funcs->crtc_compute_clock(state, crtc); > }
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index 494a343850e7..7960f1d52eaa 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -1406,12 +1406,12 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state, if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll)) return 0; - if (!crtc_state->hw.enable) - return 0; - memset(&crtc_state->dpll_hw_state, 0, sizeof(crtc_state->dpll_hw_state)); + if (!crtc_state->hw.enable) + return 0; + return i915->dpll_funcs->crtc_compute_clock(state, crtc); }