| Message ID | 20220406191848.20895-1-ashutosh.dixit@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/rps: Centralize computation of freq caps | expand |
> -----Original Message----- > From: Dixit, Ashutosh <ashutosh.dixit@intel.com> > Sent: Thursday, April 7, 2022 12:49 AM > To: intel-gfx@lists.freedesktop.org > Cc: Gupta, Anshuman <anshuman.gupta@intel.com> > Subject: [PATCH] drm/i915/rps: Centralize computation of freq caps > > Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW. However the > formats (bit positions, widths, registers and units) of these vary for different > generations with even more variations arriving in the future. In order not to > have to do identical computation for these caps in multiple places, here we > centralize the computation of these caps. This makes the code cleaner and also > more extensible for the future. > > v2: Clarify that caps are in "hw units" in comments (Lucas De Marchi) > v3: Minor checkpatch fix > v4: s/intel_rps_get_freq_caps/gen6_rps_get_freq_caps/ (Badal Nilawar) > v5: Changes comments to kernel doc (Anshuman Gupta) Acked-by: Anshuman Gupta <anshuman.gupta@intel.com> > > Cc: Anshuman Gupta <anshuman.gupta@intel.com> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > Reviewed-by: Badal Nilawar <badal.nilawar@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 24 +--- > drivers/gpu/drm/i915/gt/intel_rps.c | 108 +++++++++++------- > drivers/gpu/drm/i915/gt/intel_rps.h | 2 +- > drivers/gpu/drm/i915/gt/intel_rps_types.h | 15 +++ > drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 14 +-- > 5 files changed, 91 insertions(+), 72 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c > b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c > index 003a53c49c86..0c6b9eb724ae 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c > @@ -342,17 +342,16 @@ void intel_gt_pm_frequency_dump(struct intel_gt > *gt, struct drm_printer *p) > } else if (GRAPHICS_VER(i915) >= 6) { > u32 rp_state_limits; > u32 gt_perf_status; > - u32 rp_state_cap; > + struct intel_rps_freq_caps caps; > u32 rpmodectl, rpinclimit, rpdeclimit; > u32 rpstat, cagf, reqf; > u32 rpcurupei, rpcurup, rpprevup; > u32 rpcurdownei, rpcurdown, rpprevdown; > u32 rpupei, rpupt, rpdownei, rpdownt; > u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask; > - int max_freq; > > rp_state_limits = intel_uncore_read(uncore, > GEN6_RP_STATE_LIMITS); > - rp_state_cap = intel_rps_read_state_cap(rps); > + gen6_rps_get_freq_caps(rps, &caps); > if (IS_GEN9_LP(i915)) > gt_perf_status = intel_uncore_read(uncore, > BXT_GT_PERF_STATUS); > else > @@ -474,25 +473,12 @@ void intel_gt_pm_frequency_dump(struct intel_gt > *gt, struct drm_printer *p) > drm_printf(p, "RP DOWN THRESHOLD: %d (%lldns)\n", > rpdownt, intel_gt_pm_interval_to_ns(gt, rpdownt)); > > - max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 0 : > - rp_state_cap >> 16) & 0xff; > - max_freq *= (IS_GEN9_BC(i915) || > - GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : > 1); > drm_printf(p, "Lowest (RPN) frequency: %dMHz\n", > - intel_gpu_freq(rps, max_freq)); > - > - max_freq = (rp_state_cap & 0xff00) >> 8; > - max_freq *= (IS_GEN9_BC(i915) || > - GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : > 1); > + intel_gpu_freq(rps, caps.min_freq)); > drm_printf(p, "Nominal (RP1) frequency: %dMHz\n", > - intel_gpu_freq(rps, max_freq)); > - > - max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 16 : > - rp_state_cap >> 0) & 0xff; > - max_freq *= (IS_GEN9_BC(i915) || > - GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : > 1); > + intel_gpu_freq(rps, caps.rp1_freq)); > drm_printf(p, "Max non-overclocked (RP0) frequency: > %dMHz\n", > - intel_gpu_freq(rps, max_freq)); > + intel_gpu_freq(rps, caps.rp0_freq)); > drm_printf(p, "Max overclocked frequency: %dMHz\n", > intel_gpu_freq(rps, rps->max_freq)); > > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c > b/drivers/gpu/drm/i915/gt/intel_rps.c > index 6c9fdf7906c5..3476a11f294c 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rps.c > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c > @@ -1070,24 +1070,67 @@ int intel_rps_set(struct intel_rps *rps, u8 val) > return 0; > } > > -static void gen6_rps_init(struct intel_rps *rps) > +static u32 intel_rps_read_state_cap(struct intel_rps *rps) > { > struct drm_i915_private *i915 = rps_to_i915(rps); > - u32 rp_state_cap = intel_rps_read_state_cap(rps); > + struct intel_uncore *uncore = rps_to_uncore(rps); > > - /* All of these values are in units of 50MHz */ > + if (IS_XEHPSDV(i915)) > + return intel_uncore_read(uncore, XEHPSDV_RP_STATE_CAP); > + else if (IS_GEN9_LP(i915)) > + return intel_uncore_read(uncore, BXT_RP_STATE_CAP); > + else > + return intel_uncore_read(uncore, GEN6_RP_STATE_CAP); } > + > +/** > + * gen6_rps_get_freq_caps - Get freq caps exposed by HW > + * @rps: the intel_rps structure > + * @caps: returned freq caps > + * > + * Returned "caps" frequencies should be converted to MHz using > + * intel_gpu_freq() > + */ > +void gen6_rps_get_freq_caps(struct intel_rps *rps, struct > +intel_rps_freq_caps *caps) { > + struct drm_i915_private *i915 = rps_to_i915(rps); > + u32 rp_state_cap; > + > + rp_state_cap = intel_rps_read_state_cap(rps); > > /* static values from HW: RP0 > RP1 > RPn (min_freq) */ > if (IS_GEN9_LP(i915)) { > - rps->rp0_freq = (rp_state_cap >> 16) & 0xff; > - rps->rp1_freq = (rp_state_cap >> 8) & 0xff; > - rps->min_freq = (rp_state_cap >> 0) & 0xff; > + caps->rp0_freq = (rp_state_cap >> 16) & 0xff; > + caps->rp1_freq = (rp_state_cap >> 8) & 0xff; > + caps->min_freq = (rp_state_cap >> 0) & 0xff; > } else { > - rps->rp0_freq = (rp_state_cap >> 0) & 0xff; > - rps->rp1_freq = (rp_state_cap >> 8) & 0xff; > - rps->min_freq = (rp_state_cap >> 16) & 0xff; > + caps->rp0_freq = (rp_state_cap >> 0) & 0xff; > + caps->rp1_freq = (rp_state_cap >> 8) & 0xff; > + caps->min_freq = (rp_state_cap >> 16) & 0xff; > } > > + if (IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) { > + /* > + * In this case rp_state_cap register reports frequencies in > + * units of 50 MHz. Convert these to the actual "hw unit", i.e. > + * units of 16.67 MHz > + */ > + caps->rp0_freq *= GEN9_FREQ_SCALER; > + caps->rp1_freq *= GEN9_FREQ_SCALER; > + caps->min_freq *= GEN9_FREQ_SCALER; > + } > +} > + > +static void gen6_rps_init(struct intel_rps *rps) { > + struct drm_i915_private *i915 = rps_to_i915(rps); > + struct intel_rps_freq_caps caps; > + > + gen6_rps_get_freq_caps(rps, &caps); > + rps->rp0_freq = caps.rp0_freq; > + rps->rp1_freq = caps.rp1_freq; > + rps->min_freq = caps.min_freq; > + > /* hw_max = RP0 until we check for overclocking */ > rps->max_freq = rps->rp0_freq; > > @@ -1095,26 +1138,18 @@ static void gen6_rps_init(struct intel_rps *rps) > if (IS_HASWELL(i915) || IS_BROADWELL(i915) || > IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) { > u32 ddcc_status = 0; > + u32 mult = 1; > > + if (IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) > + mult = GEN9_FREQ_SCALER; > if (snb_pcode_read(i915, > HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL, > &ddcc_status, NULL) == 0) > rps->efficient_freq = > - clamp_t(u8, > - (ddcc_status >> 8) & 0xff, > + clamp_t(u32, > + ((ddcc_status >> 8) & 0xff) * mult, > rps->min_freq, > rps->max_freq); > } > - > - if (IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) { > - /* Store the frequency values in 16.66 MHZ units, which is > - * the natural hardware unit for SKL > - */ > - rps->rp0_freq *= GEN9_FREQ_SCALER; > - rps->rp1_freq *= GEN9_FREQ_SCALER; > - rps->min_freq *= GEN9_FREQ_SCALER; > - rps->max_freq *= GEN9_FREQ_SCALER; > - rps->efficient_freq *= GEN9_FREQ_SCALER; > - } > } > > static bool rps_reset(struct intel_rps *rps) @@ -2219,19 +2254,6 @@ int > intel_rps_set_min_frequency(struct intel_rps *rps, u32 val) > return set_min_freq(rps, val); > } > > -u32 intel_rps_read_state_cap(struct intel_rps *rps) -{ > - struct drm_i915_private *i915 = rps_to_i915(rps); > - struct intel_uncore *uncore = rps_to_uncore(rps); > - > - if (IS_XEHPSDV(i915)) > - return intel_uncore_read(uncore, XEHPSDV_RP_STATE_CAP); > - else if (IS_GEN9_LP(i915)) > - return intel_uncore_read(uncore, BXT_RP_STATE_CAP); > - else > - return intel_uncore_read(uncore, GEN6_RP_STATE_CAP); > -} > - > static void intel_rps_set_manual(struct intel_rps *rps, bool enable) { > struct intel_uncore *uncore = rps_to_uncore(rps); @@ -2244,18 > +2266,18 @@ static void intel_rps_set_manual(struct intel_rps *rps, bool > enable) void intel_rps_raise_unslice(struct intel_rps *rps) { > struct intel_uncore *uncore = rps_to_uncore(rps); > - u32 rp0_unslice_req; > > mutex_lock(&rps->lock); > > if (rps_uses_slpc(rps)) { > /* RP limits have not been initialized yet for SLPC path */ > - rp0_unslice_req = ((intel_rps_read_state_cap(rps) >> 0) > - & 0xff) * GEN9_FREQ_SCALER; > + struct intel_rps_freq_caps caps; > + > + gen6_rps_get_freq_caps(rps, &caps); > > intel_rps_set_manual(rps, true); > intel_uncore_write(uncore, GEN6_RPNSWREQ, > - ((rp0_unslice_req << > + ((caps.rp0_freq << > GEN9_SW_REQ_UNSLICE_RATIO_SHIFT) | > GEN9_IGNORE_SLICE_RATIO)); > intel_rps_set_manual(rps, false); > @@ -2269,18 +2291,18 @@ void intel_rps_raise_unslice(struct intel_rps *rps) > void intel_rps_lower_unslice(struct intel_rps *rps) { > struct intel_uncore *uncore = rps_to_uncore(rps); > - u32 rpn_unslice_req; > > mutex_lock(&rps->lock); > > if (rps_uses_slpc(rps)) { > /* RP limits have not been initialized yet for SLPC path */ > - rpn_unslice_req = ((intel_rps_read_state_cap(rps) >> 16) > - & 0xff) * GEN9_FREQ_SCALER; > + struct intel_rps_freq_caps caps; > + > + gen6_rps_get_freq_caps(rps, &caps); > > intel_rps_set_manual(rps, true); > intel_uncore_write(uncore, GEN6_RPNSWREQ, > - ((rpn_unslice_req << > + ((caps.min_freq << > GEN9_SW_REQ_UNSLICE_RATIO_SHIFT) | > GEN9_IGNORE_SLICE_RATIO)); > intel_rps_set_manual(rps, false); > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h > b/drivers/gpu/drm/i915/gt/intel_rps.h > index ba1ed9f7ecda..1e8d56491308 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rps.h > +++ b/drivers/gpu/drm/i915/gt/intel_rps.h > @@ -45,7 +45,7 @@ u32 intel_rps_get_rp1_frequency(struct intel_rps *rps); > u32 intel_rps_get_rpn_frequency(struct intel_rps *rps); > u32 intel_rps_read_punit_req(struct intel_rps *rps); > u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps); > -u32 intel_rps_read_state_cap(struct intel_rps *rps); > +void gen6_rps_get_freq_caps(struct intel_rps *rps, struct > +intel_rps_freq_caps *caps); > void intel_rps_raise_unslice(struct intel_rps *rps); void > intel_rps_lower_unslice(struct intel_rps *rps); > > diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h > b/drivers/gpu/drm/i915/gt/intel_rps_types.h > index 3941d8551f52..9173ec75f2b8 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rps_types.h > +++ b/drivers/gpu/drm/i915/gt/intel_rps_types.h > @@ -37,6 +37,21 @@ enum { > INTEL_RPS_TIMER, > }; > > +/** > + * struct intel_rps_freq_caps - rps freq capabilities > + * @rp0_freq: non-overclocked max frequency > + * @rp1_freq: "less than" RP0 power/freqency > + * @min_freq: aka RPn, minimum frequency > + * > + * Freq caps exposed by HW, values are in "hw units" and > +intel_gpu_freq() > + * should be used to convert to MHz > + */ > +struct intel_rps_freq_caps { > + u8 rp0_freq; > + u8 rp1_freq; > + u8 min_freq; > +}; > + > struct intel_rps { > struct mutex lock; /* protects enabling and the worker */ > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > index 9f032c65a488..9e02355e44f1 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > @@ -582,16 +582,12 @@ static int slpc_use_fused_rp0(struct intel_guc_slpc > *slpc) static void slpc_get_rp_values(struct intel_guc_slpc *slpc) { > struct intel_rps *rps = &slpc_to_gt(slpc)->rps; > - u32 rp_state_cap; > + struct intel_rps_freq_caps caps; > > - rp_state_cap = intel_rps_read_state_cap(rps); > - > - slpc->rp0_freq = REG_FIELD_GET(RP0_CAP_MASK, rp_state_cap) * > - GT_FREQUENCY_MULTIPLIER; > - slpc->rp1_freq = REG_FIELD_GET(RP1_CAP_MASK, rp_state_cap) * > - GT_FREQUENCY_MULTIPLIER; > - slpc->min_freq = REG_FIELD_GET(RPN_CAP_MASK, rp_state_cap) * > - GT_FREQUENCY_MULTIPLIER; > + gen6_rps_get_freq_caps(rps, &caps); > + slpc->rp0_freq = intel_gpu_freq(rps, caps.rp0_freq); > + slpc->rp1_freq = intel_gpu_freq(rps, caps.rp1_freq); > + slpc->min_freq = intel_gpu_freq(rps, caps.min_freq); > > if (!slpc->boost_freq) > slpc->boost_freq = slpc->rp0_freq; > -- > 2.34.1
On 2022-04-07 at 09:44:48 +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915/rps: Centralize computation of freq caps (rev6) > URL : https://patchwork.freedesktop.org/series/101606/ > State : success Pushed to drm-intel-gt-next. Thanks for patch and review. Br, Anshuman. > > == Summary == > > CI Bug Log - changes from CI_DRM_11467_full -> Patchwork_22802_full > ==================================================== > > Summary > ------- > > **SUCCESS** > > No regressions found. > > > > Participating hosts (13 -> 13) > ------------------------------ > > No changes in participating hosts > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in Patchwork_22802_full: > > ### IGT changes ### > > #### Suppressed #### > > The following results come from untrusted machines, tests, or statuses. > They do not affect the overall result. > > * igt@gem_exec_schedule@wide@bcs0: > - {shard-rkl}: NOTRUN -> [INCOMPLETE][1] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-5/igt@gem_exec_schedule@wide@bcs0.html > > > Known issues > ------------ > > Here are the changes found in Patchwork_22802_full that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@gem_ccs@ctrl-surf-copy: > - shard-iclb: NOTRUN -> [SKIP][2] ([i915#5327]) > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_ccs@ctrl-surf-copy.html > > * igt@gem_ctx_isolation@preservation-s3@bcs0: > - shard-apl: [PASS][3] -> [DMESG-WARN][4] ([i915#180]) +6 similar issues > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-apl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl6/igt@gem_ctx_isolation@preservation-s3@bcs0.html > > * igt@gem_exec_capture@pi@bcs0: > - shard-skl: NOTRUN -> [INCOMPLETE][5] ([i915#4547]) > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@gem_exec_capture@pi@bcs0.html > > * igt@gem_exec_fair@basic-deadline: > - shard-skl: NOTRUN -> [FAIL][6] ([i915#2846]) > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@gem_exec_fair@basic-deadline.html > > * igt@gem_exec_fair@basic-flow@rcs0: > - shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2842]) > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html > > * igt@gem_exec_flush@basic-batch-kernel-default-wb: > - shard-snb: [PASS][9] -> [SKIP][10] ([fdo#109271]) +3 similar issues > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-snb7/igt@gem_exec_flush@basic-batch-kernel-default-wb.html > [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-snb6/igt@gem_exec_flush@basic-batch-kernel-default-wb.html > > * igt@gem_exec_params@secure-non-root: > - shard-tglb: NOTRUN -> [SKIP][11] ([fdo#112283]) > [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@gem_exec_params@secure-non-root.html > - shard-iclb: NOTRUN -> [SKIP][12] ([fdo#112283]) > [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_exec_params@secure-non-root.html > > * igt@gem_lmem_swapping@random: > - shard-tglb: NOTRUN -> [SKIP][13] ([i915#4613]) > [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@gem_lmem_swapping@random.html > - shard-skl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613]) > [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@gem_lmem_swapping@random.html > > * igt@gem_lmem_swapping@smem-oom: > - shard-iclb: NOTRUN -> [SKIP][15] ([i915#4613]) +1 similar issue > [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_lmem_swapping@smem-oom.html > - shard-apl: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613]) > [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl1/igt@gem_lmem_swapping@smem-oom.html > > * igt@gem_mmap_gtt@coherency: > - shard-iclb: NOTRUN -> [SKIP][17] ([fdo#109292]) > [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_mmap_gtt@coherency.html > > * igt@gem_pread@exhaustion: > - shard-apl: NOTRUN -> [WARN][18] ([i915#2658]) > [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl1/igt@gem_pread@exhaustion.html > - shard-iclb: NOTRUN -> [WARN][19] ([i915#2658]) > [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_pread@exhaustion.html > > * igt@gem_pxp@create-protected-buffer: > - shard-iclb: NOTRUN -> [SKIP][20] ([i915#4270]) > [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_pxp@create-protected-buffer.html > - shard-tglb: NOTRUN -> [SKIP][21] ([i915#4270]) > [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@gem_pxp@create-protected-buffer.html > > * igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled: > - shard-iclb: NOTRUN -> [SKIP][22] ([i915#768]) +1 similar issue > [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled.html > > * igt@gen9_exec_parse@basic-rejected-ctx-param: > - shard-iclb: NOTRUN -> [SKIP][23] ([i915#2856]) +1 similar issue > [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@gen9_exec_parse@basic-rejected-ctx-param.html > > * igt@gen9_exec_parse@cmd-crossing-page: > - shard-tglb: NOTRUN -> [SKIP][24] ([i915#2527] / [i915#2856]) > [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@gen9_exec_parse@cmd-crossing-page.html > > * igt@i915_pm_dc@dc6-psr: > - shard-iclb: [PASS][25] -> [FAIL][26] ([i915#454]) > [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-iclb2/igt@i915_pm_dc@dc6-psr.html > [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb8/igt@i915_pm_dc@dc6-psr.html > > * igt@i915_pm_sseu@full-enable: > - shard-iclb: NOTRUN -> [SKIP][27] ([i915#4387]) > [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@i915_pm_sseu@full-enable.html > > * igt@i915_query@query-topology-unsupported: > - shard-iclb: NOTRUN -> [SKIP][28] ([fdo#109302]) > [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@i915_query@query-topology-unsupported.html > > * igt@i915_suspend@fence-restore-untiled: > - shard-glk: [PASS][29] -> [SKIP][30] ([fdo#109271]) > [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-glk5/igt@i915_suspend@fence-restore-untiled.html > [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-glk1/igt@i915_suspend@fence-restore-untiled.html > > * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: > - shard-tglb: NOTRUN -> [SKIP][31] ([i915#5286]) +1 similar issue > [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html > > * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip: > - shard-iclb: NOTRUN -> [SKIP][32] ([i915#5286]) +2 similar issues > [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html > > * igt@kms_big_fb@x-tiled-16bpp-rotate-270: > - shard-iclb: NOTRUN -> [SKIP][33] ([fdo#110725] / [fdo#111614]) > [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html > > * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: > - shard-tglb: NOTRUN -> [SKIP][34] ([fdo#111615]) > [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html > > * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_rc_ccs_cc: > - shard-iclb: NOTRUN -> [SKIP][35] ([fdo#109278] / [i915#3886]) > [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html > > * igt@kms_color@pipe-d-ctm-negative: > - shard-kbl: NOTRUN -> [SKIP][36] ([fdo#109271]) +16 similar issues > [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-kbl6/igt@kms_color@pipe-d-ctm-negative.html > > * igt@kms_color_chamelium@pipe-c-ctm-0-5: > - shard-iclb: NOTRUN -> [SKIP][37] ([fdo#109284] / [fdo#111827]) +3 similar issues > [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_color_chamelium@pipe-c-ctm-0-5.html > - shard-skl: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) > [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@kms_color_chamelium@pipe-c-ctm-0-5.html > - shard-tglb: NOTRUN -> [SKIP][39] ([fdo#109284] / [fdo#111827]) > [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@kms_color_chamelium@pipe-c-ctm-0-5.html > > * igt@kms_color_chamelium@pipe-c-degamma: > - shard-apl: NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827]) +3 similar issues > [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl3/igt@kms_color_chamelium@pipe-c-degamma.html > - shard-kbl: NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827]) +1 similar issue > [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-kbl6/igt@kms_color_chamelium@pipe-c-degamma.html > > * igt@kms_cursor_crc@pipe-a-cursor-512x170-random: > - shard-tglb: NOTRUN -> [SKIP][42] ([fdo#109279] / [i915#3359]) > [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-512x170-random.html > - shard-iclb: NOTRUN -> [SKIP][43] ([fdo#109278] / [fdo#109279]) +1 similar issue > [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_cursor_crc@pipe-a-cursor-512x170-random.html > > * igt@kms_cursor_crc@pipe-d-cursor-32x10-onscreen: > - shard-tglb: NOTRUN -> [SKIP][44] ([i915#3359]) > [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@kms_cursor_crc@pipe-d-cursor-32x10-onscreen.html > > * igt@kms_cursor_crc@pipe-d-cursor-64x64-rapid-movement: > - shard-iclb: NOTRUN -> [SKIP][45] ([fdo#109278]) +13 similar issues > [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_cursor_crc@pipe-d-cursor-64x64-rapid-movement.html > > * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size: > - shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109274] / [fdo#109278]) +1 similar issue > [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html > > * igt@kms_flip@2x-nonexisting-fb: > - shard-iclb: NOTRUN -> [SKIP][47] ([fdo#109274]) +4 similar issues > [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_flip@2x-nonexisting-fb.html > > * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1: > - shard-skl: [PASS][48] -> [FAIL][49] ([i915#2122]) +1 similar issue > [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html > [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html > > * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling: > - shard-iclb: [PASS][50] -> [SKIP][51] ([i915#3701]) > [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-iclb6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html > [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html > > * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt: > - shard-glk: [PASS][52] -> [FAIL][53] ([i915#1888] / [i915#2546]) > [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-glk5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html > [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-glk1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-plflip-blt.html > > * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-pwrite: > - shard-skl: NOTRUN -> [SKIP][54] ([fdo#109271]) +7 similar issues > [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-pwrite.html > - shard-tglb: NOTRUN -> [SKIP][55] ([fdo#109280] / [fdo#111825]) +4 similar issues > [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-pwrite.html > > * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt: > - shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271]) +39 similar issues > [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html > > * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4: > - shard-iclb: NOTRUN -> [SKIP][57] ([i915#5438]) > [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html > > * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-move: > - shard-iclb: NOTRUN -> [SKIP][58] ([fdo#109280]) +7 similar issues > [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-move.html > > * igt@kms_hdr@bpc-switch-suspend@bpc-switch-suspend-edp-1-pipe-a: > - shard-skl: [PASS][59] -> [FAIL][60] ([i915#1188]) > [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-skl6/igt@kms_hdr@bpc-switch-suspend@bpc-switch-suspend-edp-1-pipe-a.html > [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl9/igt@kms_hdr@bpc-switch-suspend@bpc-switch-suspend-edp-1-pipe-a.html > > * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: > - shard-skl: [PASS][61] -> [FAIL][62] ([fdo#108145] / [i915#265]) > [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html > [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html > > * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: > - shard-kbl: NOTRUN -> [FAIL][63] ([fdo#108145] / [i915#265]) > [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html > - shard-apl: NOTRUN -> [FAIL][64] ([fdo#108145] / [i915#265]) > [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl3/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html > > * igt@kms_plane_scaling@downscale-with-pixel-format-factor-0-25@pipe-a-edp-1-downscale-with-pixel-format: > - shard-iclb: NOTRUN -> [SKIP][65] ([i915#5176]) +2 similar issues > [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_plane_scaling@downscale-with-pixel-format-factor-0-25@pipe-a-edp-1-downscale-with-pixel-format.html > > * igt@kms_psr@psr2_sprite_plane_move: > - shard-iclb: [PASS][66] -> [SKIP][67] ([fdo#109441]) +3 similar issues > [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html > [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html > > * igt@kms_vrr@flipline: > - shard-iclb: NOTRUN -> [SKIP][68] ([fdo#109502]) > [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@kms_vrr@flipline.html > > * igt@nouveau_crc@pipe-a-source-outp-complete: > - shard-tglb: NOTRUN -> [SKIP][69] ([i915#2530]) > [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb3/igt@nouveau_crc@pipe-a-source-outp-complete.html > - shard-iclb: NOTRUN -> [SKIP][70] ([i915#2530]) > [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@nouveau_crc@pipe-a-source-outp-complete.html > > * igt@perf@polling-small-buf: > - shard-skl: [PASS][71] -> [FAIL][72] ([i915#1722]) > [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-skl6/igt@perf@polling-small-buf.html > [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl9/igt@perf@polling-small-buf.html > > * igt@prime_nv_api@nv_self_import_to_different_fd: > - shard-iclb: NOTRUN -> [SKIP][73] ([fdo#109291]) > [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@prime_nv_api@nv_self_import_to_different_fd.html > > > #### Possible fixes #### > > * igt@fbdev@info: > - {shard-rkl}: [SKIP][74] ([i915#2582]) -> [PASS][75] > [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-5/igt@fbdev@info.html > [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@fbdev@info.html > > * igt@gem_eio@unwedge-stress: > - shard-tglb: [FAIL][76] ([i915#232]) -> [PASS][77] > [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-tglb5/igt@gem_eio@unwedge-stress.html > [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb7/igt@gem_eio@unwedge-stress.html > > * igt@gem_exec_balancer@parallel-balancer: > - shard-iclb: [SKIP][78] ([i915#4525]) -> [PASS][79] > [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-iclb7/igt@gem_exec_balancer@parallel-balancer.html > [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb1/igt@gem_exec_balancer@parallel-balancer.html > > * igt@gem_exec_capture@pi@rcs0: > - shard-skl: [INCOMPLETE][80] ([i915#4547]) -> [PASS][81] > [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-skl4/igt@gem_exec_capture@pi@rcs0.html > [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl10/igt@gem_exec_capture@pi@rcs0.html > > * igt@gem_exec_endless@dispatch@vecs0: > - shard-tglb: [INCOMPLETE][82] ([i915#3778]) -> [PASS][83] > [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-tglb3/igt@gem_exec_endless@dispatch@vecs0.html > [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglb2/igt@gem_exec_endless@dispatch@vecs0.html > > * igt@gem_exec_fair@basic-pace-solo@rcs0: > - shard-apl: [FAIL][84] ([i915#2842]) -> [PASS][85] > [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-apl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html > [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl8/igt@gem_exec_fair@basic-pace-solo@rcs0.html > > * igt@gem_exec_flush@basic-batch-kernel-default-uc: > - shard-snb: [SKIP][86] ([fdo#109271]) -> [PASS][87] +6 similar issues > [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-snb6/igt@gem_exec_flush@basic-batch-kernel-default-uc.html > [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-snb7/igt@gem_exec_flush@basic-batch-kernel-default-uc.html > > * igt@gem_exec_suspend@basic-s3-devices@smem: > - shard-kbl: [DMESG-WARN][88] -> [PASS][89] > [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-kbl6/igt@gem_exec_suspend@basic-s3-devices@smem.html > [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-kbl3/igt@gem_exec_suspend@basic-s3-devices@smem.html > > * igt@gem_exec_whisper@basic-queues-priority: > - {shard-rkl}: [INCOMPLETE][90] -> [PASS][91] +1 similar issue > [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-5/igt@gem_exec_whisper@basic-queues-priority.html > [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-5/igt@gem_exec_whisper@basic-queues-priority.html > > * igt@gem_ppgtt@blt-vs-render-ctxn: > - shard-snb: [DMESG-FAIL][92] ([i915#3692]) -> [PASS][93] > [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-snb6/igt@gem_ppgtt@blt-vs-render-ctxn.html > [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-snb7/igt@gem_ppgtt@blt-vs-render-ctxn.html > > * igt@gem_softpin@allocator-evict-all-engines: > - shard-glk: [FAIL][94] ([i915#4171]) -> [PASS][95] > [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-glk3/igt@gem_softpin@allocator-evict-all-engines.html > [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-glk5/igt@gem_softpin@allocator-evict-all-engines.html > > * igt@i915_pm_dc@dc6-dpms: > - shard-iclb: [FAIL][96] ([i915#454]) -> [PASS][97] > [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html > [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb5/igt@i915_pm_dc@dc6-dpms.html > > * igt@i915_pm_rpm@i2c: > - {shard-rkl}: [SKIP][98] ([fdo#109308]) -> [PASS][99] > [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-5/igt@i915_pm_rpm@i2c.html > [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@i915_pm_rpm@i2c.html > > * igt@i915_pm_rpm@system-suspend-execbuf: > - shard-iclb: [INCOMPLETE][100] ([i915#5096]) -> [PASS][101] > [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-iclb4/igt@i915_pm_rpm@system-suspend-execbuf.html > [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb6/igt@i915_pm_rpm@system-suspend-execbuf.html > > * igt@kms_big_fb@linear-32bpp-rotate-180: > - shard-glk: [DMESG-WARN][102] ([i915#118]) -> [PASS][103] +1 similar issue > [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-glk8/igt@kms_big_fb@linear-32bpp-rotate-180.html > [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-glk6/igt@kms_big_fb@linear-32bpp-rotate-180.html > > * igt@kms_big_fb@x-tiled-32bpp-rotate-0: > - {shard-tglu}: [DMESG-WARN][104] ([i915#402]) -> [PASS][105] > [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-tglu-6/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html > [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-tglu-2/igt@kms_big_fb@x-tiled-32bpp-rotate-0.html > > * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0: > - {shard-rkl}: [SKIP][106] ([i915#1845] / [i915#4098]) -> [PASS][107] +28 similar issues > [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html > [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html > > * igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_ccs: > - shard-kbl: [DMESG-WARN][108] ([i915#62] / [i915#92]) -> [PASS][109] +5 similar issues > [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-kbl6/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_ccs.html > [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-kbl3/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_ccs.html > > * igt@kms_color@pipe-c-invalid-degamma-lut-sizes: > - {shard-rkl}: [SKIP][110] ([i915#4070]) -> [PASS][111] > [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-6/igt@kms_color@pipe-c-invalid-degamma-lut-sizes.html > [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-5/igt@kms_color@pipe-c-invalid-degamma-lut-sizes.html > > * igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding: > - {shard-rkl}: [SKIP][112] ([fdo#112022] / [i915#4070]) -> [PASS][113] +9 similar issues > [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-1/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html > [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-128x128-sliding.html > > * igt@kms_cursor_edge_walk@pipe-b-64x64-right-edge: > - {shard-rkl}: [SKIP][114] ([i915#1849] / [i915#4070] / [i915#4098]) -> [PASS][115] +2 similar issues > [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-1/igt@kms_cursor_edge_walk@pipe-b-64x64-right-edge.html > [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_cursor_edge_walk@pipe-b-64x64-right-edge.html > > * igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic: > - {shard-rkl}: [SKIP][116] ([fdo#111825] / [i915#4070]) -> [PASS][117] +5 similar issues > [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-5/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html > [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html > > * igt@kms_cursor_legacy@flip-vs-cursor-toggle: > - shard-iclb: [FAIL][118] ([i915#2346]) -> [PASS][119] > [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html > [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-iclb1/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html > > * igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled: > - {shard-rkl}: [SKIP][120] ([fdo#111314] / [i915#4098] / [i915#4369]) -> [PASS][121] +3 similar issues > [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-1/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html > [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html > > * igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled: > - {shard-rkl}: [SKIP][122] ([i915#4098] / [i915#4369]) -> [PASS][123] +1 similar issue > [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-4/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html > [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html > > * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1: > - shard-apl: [DMESG-WARN][124] ([i915#180]) -> [PASS][125] +2 similar issues > [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-apl2/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html > [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html > - shard-kbl: [INCOMPLETE][126] ([i915#636]) -> [PASS][127] > [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html > [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html > > * igt@kms_flip@flip-vs-wf_vblank-interruptible@a-dp1: > - shard-kbl: [DMESG-WARN][128] ([i915#1982] / [i915#62] / [i915#92]) -> [PASS][129] > [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-kbl6/igt@kms_flip@flip-vs-wf_vblank-interruptible@a-dp1.html > [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-kbl3/igt@kms_flip@flip-vs-wf_vblank-interruptible@a-dp1.html > > * igt@kms_flip@plain-flip-ts-check@a-edp1: > - shard-skl: [FAIL][130] ([i915#2122]) -> [PASS][131] > [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-skl10/igt@kms_flip@plain-flip-ts-check@a-edp1.html > [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-skl6/igt@kms_flip@plain-flip-ts-check@a-edp1.html > > * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling: > - {shard-rkl}: [INCOMPLETE][132] ([i915#3701]) -> [PASS][133] > [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html > [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html > > * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling: > - shard-glk: [FAIL][134] ([i915#4911]) -> [PASS][135] > [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html > [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-glk3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html > > * igt@kms_frontbuffer_tracking@basic: > - {shard-rkl}: [SKIP][136] ([i915#1849] / [i915#4098]) -> [PASS][137] +23 similar issues > [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-4/igt@kms_frontbuffer_tracking@basic.html > [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_frontbuffer_tracking@basic.html > > * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite: > - shard-glk: [FAIL][138] ([i915#2546]) -> [PASS][139] > [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-glk4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html > [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-glk3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html > > * igt@kms_invalid_mode@int-max-clock: > - {shard-rkl}: [SKIP][140] ([i915#4278]) -> [PASS][141] +1 similar issue > [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-4/igt@kms_invalid_mode@int-max-clock.html > [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/shard-rkl-6/igt@kms_invalid_mode@int-max-clock.html > > * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: > - {shard-rkl}: [SKIP][142] ([i915#4098]) -> [PASS][143] +1 similar issue > [142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11467/shard-rkl-4/igt@ > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22802/index.html
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c index 003a53c49c86..0c6b9eb724ae 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c @@ -342,17 +342,16 @@ void intel_gt_pm_frequency_dump(struct intel_gt *gt, struct drm_printer *p) } else if (GRAPHICS_VER(i915) >= 6) { u32 rp_state_limits; u32 gt_perf_status; - u32 rp_state_cap; + struct intel_rps_freq_caps caps; u32 rpmodectl, rpinclimit, rpdeclimit; u32 rpstat, cagf, reqf; u32 rpcurupei, rpcurup, rpprevup; u32 rpcurdownei, rpcurdown, rpprevdown; u32 rpupei, rpupt, rpdownei, rpdownt; u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask; - int max_freq; rp_state_limits = intel_uncore_read(uncore, GEN6_RP_STATE_LIMITS); - rp_state_cap = intel_rps_read_state_cap(rps); + gen6_rps_get_freq_caps(rps, &caps); if (IS_GEN9_LP(i915)) gt_perf_status = intel_uncore_read(uncore, BXT_GT_PERF_STATUS); else @@ -474,25 +473,12 @@ void intel_gt_pm_frequency_dump(struct intel_gt *gt, struct drm_printer *p) drm_printf(p, "RP DOWN THRESHOLD: %d (%lldns)\n", rpdownt, intel_gt_pm_interval_to_ns(gt, rpdownt)); - max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 0 : - rp_state_cap >> 16) & 0xff; - max_freq *= (IS_GEN9_BC(i915) || - GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1); drm_printf(p, "Lowest (RPN) frequency: %dMHz\n", - intel_gpu_freq(rps, max_freq)); - - max_freq = (rp_state_cap & 0xff00) >> 8; - max_freq *= (IS_GEN9_BC(i915) || - GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1); + intel_gpu_freq(rps, caps.min_freq)); drm_printf(p, "Nominal (RP1) frequency: %dMHz\n", - intel_gpu_freq(rps, max_freq)); - - max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 16 : - rp_state_cap >> 0) & 0xff; - max_freq *= (IS_GEN9_BC(i915) || - GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1); + intel_gpu_freq(rps, caps.rp1_freq)); drm_printf(p, "Max non-overclocked (RP0) frequency: %dMHz\n", - intel_gpu_freq(rps, max_freq)); + intel_gpu_freq(rps, caps.rp0_freq)); drm_printf(p, "Max overclocked frequency: %dMHz\n", intel_gpu_freq(rps, rps->max_freq)); diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 6c9fdf7906c5..3476a11f294c 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -1070,24 +1070,67 @@ int intel_rps_set(struct intel_rps *rps, u8 val) return 0; } -static void gen6_rps_init(struct intel_rps *rps) +static u32 intel_rps_read_state_cap(struct intel_rps *rps) { struct drm_i915_private *i915 = rps_to_i915(rps); - u32 rp_state_cap = intel_rps_read_state_cap(rps); + struct intel_uncore *uncore = rps_to_uncore(rps); - /* All of these values are in units of 50MHz */ + if (IS_XEHPSDV(i915)) + return intel_uncore_read(uncore, XEHPSDV_RP_STATE_CAP); + else if (IS_GEN9_LP(i915)) + return intel_uncore_read(uncore, BXT_RP_STATE_CAP); + else + return intel_uncore_read(uncore, GEN6_RP_STATE_CAP); +} + +/** + * gen6_rps_get_freq_caps - Get freq caps exposed by HW + * @rps: the intel_rps structure + * @caps: returned freq caps + * + * Returned "caps" frequencies should be converted to MHz using + * intel_gpu_freq() + */ +void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps) +{ + struct drm_i915_private *i915 = rps_to_i915(rps); + u32 rp_state_cap; + + rp_state_cap = intel_rps_read_state_cap(rps); /* static values from HW: RP0 > RP1 > RPn (min_freq) */ if (IS_GEN9_LP(i915)) { - rps->rp0_freq = (rp_state_cap >> 16) & 0xff; - rps->rp1_freq = (rp_state_cap >> 8) & 0xff; - rps->min_freq = (rp_state_cap >> 0) & 0xff; + caps->rp0_freq = (rp_state_cap >> 16) & 0xff; + caps->rp1_freq = (rp_state_cap >> 8) & 0xff; + caps->min_freq = (rp_state_cap >> 0) & 0xff; } else { - rps->rp0_freq = (rp_state_cap >> 0) & 0xff; - rps->rp1_freq = (rp_state_cap >> 8) & 0xff; - rps->min_freq = (rp_state_cap >> 16) & 0xff; + caps->rp0_freq = (rp_state_cap >> 0) & 0xff; + caps->rp1_freq = (rp_state_cap >> 8) & 0xff; + caps->min_freq = (rp_state_cap >> 16) & 0xff; } + if (IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) { + /* + * In this case rp_state_cap register reports frequencies in + * units of 50 MHz. Convert these to the actual "hw unit", i.e. + * units of 16.67 MHz + */ + caps->rp0_freq *= GEN9_FREQ_SCALER; + caps->rp1_freq *= GEN9_FREQ_SCALER; + caps->min_freq *= GEN9_FREQ_SCALER; + } +} + +static void gen6_rps_init(struct intel_rps *rps) +{ + struct drm_i915_private *i915 = rps_to_i915(rps); + struct intel_rps_freq_caps caps; + + gen6_rps_get_freq_caps(rps, &caps); + rps->rp0_freq = caps.rp0_freq; + rps->rp1_freq = caps.rp1_freq; + rps->min_freq = caps.min_freq; + /* hw_max = RP0 until we check for overclocking */ rps->max_freq = rps->rp0_freq; @@ -1095,26 +1138,18 @@ static void gen6_rps_init(struct intel_rps *rps) if (IS_HASWELL(i915) || IS_BROADWELL(i915) || IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) { u32 ddcc_status = 0; + u32 mult = 1; + if (IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) + mult = GEN9_FREQ_SCALER; if (snb_pcode_read(i915, HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL, &ddcc_status, NULL) == 0) rps->efficient_freq = - clamp_t(u8, - (ddcc_status >> 8) & 0xff, + clamp_t(u32, + ((ddcc_status >> 8) & 0xff) * mult, rps->min_freq, rps->max_freq); } - - if (IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) { - /* Store the frequency values in 16.66 MHZ units, which is - * the natural hardware unit for SKL - */ - rps->rp0_freq *= GEN9_FREQ_SCALER; - rps->rp1_freq *= GEN9_FREQ_SCALER; - rps->min_freq *= GEN9_FREQ_SCALER; - rps->max_freq *= GEN9_FREQ_SCALER; - rps->efficient_freq *= GEN9_FREQ_SCALER; - } } static bool rps_reset(struct intel_rps *rps) @@ -2219,19 +2254,6 @@ int intel_rps_set_min_frequency(struct intel_rps *rps, u32 val) return set_min_freq(rps, val); } -u32 intel_rps_read_state_cap(struct intel_rps *rps) -{ - struct drm_i915_private *i915 = rps_to_i915(rps); - struct intel_uncore *uncore = rps_to_uncore(rps); - - if (IS_XEHPSDV(i915)) - return intel_uncore_read(uncore, XEHPSDV_RP_STATE_CAP); - else if (IS_GEN9_LP(i915)) - return intel_uncore_read(uncore, BXT_RP_STATE_CAP); - else - return intel_uncore_read(uncore, GEN6_RP_STATE_CAP); -} - static void intel_rps_set_manual(struct intel_rps *rps, bool enable) { struct intel_uncore *uncore = rps_to_uncore(rps); @@ -2244,18 +2266,18 @@ static void intel_rps_set_manual(struct intel_rps *rps, bool enable) void intel_rps_raise_unslice(struct intel_rps *rps) { struct intel_uncore *uncore = rps_to_uncore(rps); - u32 rp0_unslice_req; mutex_lock(&rps->lock); if (rps_uses_slpc(rps)) { /* RP limits have not been initialized yet for SLPC path */ - rp0_unslice_req = ((intel_rps_read_state_cap(rps) >> 0) - & 0xff) * GEN9_FREQ_SCALER; + struct intel_rps_freq_caps caps; + + gen6_rps_get_freq_caps(rps, &caps); intel_rps_set_manual(rps, true); intel_uncore_write(uncore, GEN6_RPNSWREQ, - ((rp0_unslice_req << + ((caps.rp0_freq << GEN9_SW_REQ_UNSLICE_RATIO_SHIFT) | GEN9_IGNORE_SLICE_RATIO)); intel_rps_set_manual(rps, false); @@ -2269,18 +2291,18 @@ void intel_rps_raise_unslice(struct intel_rps *rps) void intel_rps_lower_unslice(struct intel_rps *rps) { struct intel_uncore *uncore = rps_to_uncore(rps); - u32 rpn_unslice_req; mutex_lock(&rps->lock); if (rps_uses_slpc(rps)) { /* RP limits have not been initialized yet for SLPC path */ - rpn_unslice_req = ((intel_rps_read_state_cap(rps) >> 16) - & 0xff) * GEN9_FREQ_SCALER; + struct intel_rps_freq_caps caps; + + gen6_rps_get_freq_caps(rps, &caps); intel_rps_set_manual(rps, true); intel_uncore_write(uncore, GEN6_RPNSWREQ, - ((rpn_unslice_req << + ((caps.min_freq << GEN9_SW_REQ_UNSLICE_RATIO_SHIFT) | GEN9_IGNORE_SLICE_RATIO)); intel_rps_set_manual(rps, false); diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h index ba1ed9f7ecda..1e8d56491308 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.h +++ b/drivers/gpu/drm/i915/gt/intel_rps.h @@ -45,7 +45,7 @@ u32 intel_rps_get_rp1_frequency(struct intel_rps *rps); u32 intel_rps_get_rpn_frequency(struct intel_rps *rps); u32 intel_rps_read_punit_req(struct intel_rps *rps); u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps); -u32 intel_rps_read_state_cap(struct intel_rps *rps); +void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps); void intel_rps_raise_unslice(struct intel_rps *rps); void intel_rps_lower_unslice(struct intel_rps *rps); diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h b/drivers/gpu/drm/i915/gt/intel_rps_types.h index 3941d8551f52..9173ec75f2b8 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps_types.h +++ b/drivers/gpu/drm/i915/gt/intel_rps_types.h @@ -37,6 +37,21 @@ enum { INTEL_RPS_TIMER, }; +/** + * struct intel_rps_freq_caps - rps freq capabilities + * @rp0_freq: non-overclocked max frequency + * @rp1_freq: "less than" RP0 power/freqency + * @min_freq: aka RPn, minimum frequency + * + * Freq caps exposed by HW, values are in "hw units" and intel_gpu_freq() + * should be used to convert to MHz + */ +struct intel_rps_freq_caps { + u8 rp0_freq; + u8 rp1_freq; + u8 min_freq; +}; + struct intel_rps { struct mutex lock; /* protects enabling and the worker */ diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index 9f032c65a488..9e02355e44f1 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -582,16 +582,12 @@ static int slpc_use_fused_rp0(struct intel_guc_slpc *slpc) static void slpc_get_rp_values(struct intel_guc_slpc *slpc) { struct intel_rps *rps = &slpc_to_gt(slpc)->rps; - u32 rp_state_cap; + struct intel_rps_freq_caps caps; - rp_state_cap = intel_rps_read_state_cap(rps); - - slpc->rp0_freq = REG_FIELD_GET(RP0_CAP_MASK, rp_state_cap) * - GT_FREQUENCY_MULTIPLIER; - slpc->rp1_freq = REG_FIELD_GET(RP1_CAP_MASK, rp_state_cap) * - GT_FREQUENCY_MULTIPLIER; - slpc->min_freq = REG_FIELD_GET(RPN_CAP_MASK, rp_state_cap) * - GT_FREQUENCY_MULTIPLIER; + gen6_rps_get_freq_caps(rps, &caps); + slpc->rp0_freq = intel_gpu_freq(rps, caps.rp0_freq); + slpc->rp1_freq = intel_gpu_freq(rps, caps.rp1_freq); + slpc->min_freq = intel_gpu_freq(rps, caps.min_freq); if (!slpc->boost_freq) slpc->boost_freq = slpc->rp0_freq;