| Message ID | 20220503182242.18797-17-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Make fastset not suck and allow seamless M/N changes | expand |
On Tue, 03 May 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Now that we backfeed the actual DPLL frequency into the > compute crtc state all our clocks should come out exact. /me looks at where intel_fuzzy_clock_check() is still used, and it's of course DSI. Maybe we could move the function there until we figure it out. Reviewed-by: Jani Nikula <jani.nikula@intel.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 22 +++++--------------- > 1 file changed, 5 insertions(+), 17 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 198c6340a463..066b9e7a5696 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -6118,16 +6118,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > } \ > } while (0) > > -#define PIPE_CONF_CHECK_CLOCK_FUZZY(name) do { \ > - if (!intel_fuzzy_clock_check(current_config->name, pipe_config->name)) { \ > - pipe_config_mismatch(fastset, crtc, __stringify(name), \ > - "(expected %i, found %i)", \ > - current_config->name, \ > - pipe_config->name); \ > - ret = false; \ > - } \ > -} while (0) > - > #define PIPE_CONF_CHECK_INFOFRAME(name) do { \ > if (!intel_compare_infoframe(¤t_config->infoframes.name, \ > &pipe_config->infoframes.name)) { \ > @@ -6242,7 +6232,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > PIPE_CONF_CHECK_RECT(pch_pfit.dst); > > PIPE_CONF_CHECK_I(scaler_state.scaler_id); > - PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate); > + PIPE_CONF_CHECK_I(pixel_rate); > > PIPE_CONF_CHECK_X(gamma_mode); > if (IS_CHERRYVIEW(dev_priv)) > @@ -6312,9 +6302,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5) > PIPE_CONF_CHECK_I(pipe_bpp); > > - PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock); > - PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock); > - PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock); > + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock); > + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_clock); > + PIPE_CONF_CHECK_I(port_clock); > > PIPE_CONF_CHECK_I(min_voltage_level); > > @@ -6358,7 +6348,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > #undef PIPE_CONF_CHECK_BOOL_INCOMPLETE > #undef PIPE_CONF_CHECK_P > #undef PIPE_CONF_CHECK_FLAGS > -#undef PIPE_CONF_CHECK_CLOCK_FUZZY > #undef PIPE_CONF_CHECK_COLOR_LUT > #undef PIPE_CONF_CHECK_TIMINGS > #undef PIPE_CONF_CHECK_RECT > @@ -6379,8 +6368,7 @@ static void intel_pipe_config_sanity_check(struct drm_i915_private *dev_priv, > * FDI already provided one idea for the dotclock. > * Yell if the encoder disagrees. > */ > - drm_WARN(&dev_priv->drm, > - !intel_fuzzy_clock_check(fdi_dotclock, dotclock), > + drm_WARN(&dev_priv->drm, fdi_dotclock != dotclock, > "FDI dotclock and encoder dotclock mismatch, fdi: %i, encoder: %i\n", > fdi_dotclock, dotclock); > }
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 198c6340a463..066b9e7a5696 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6118,16 +6118,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, } \ } while (0) -#define PIPE_CONF_CHECK_CLOCK_FUZZY(name) do { \ - if (!intel_fuzzy_clock_check(current_config->name, pipe_config->name)) { \ - pipe_config_mismatch(fastset, crtc, __stringify(name), \ - "(expected %i, found %i)", \ - current_config->name, \ - pipe_config->name); \ - ret = false; \ - } \ -} while (0) - #define PIPE_CONF_CHECK_INFOFRAME(name) do { \ if (!intel_compare_infoframe(¤t_config->infoframes.name, \ &pipe_config->infoframes.name)) { \ @@ -6242,7 +6232,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_RECT(pch_pfit.dst); PIPE_CONF_CHECK_I(scaler_state.scaler_id); - PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate); + PIPE_CONF_CHECK_I(pixel_rate); PIPE_CONF_CHECK_X(gamma_mode); if (IS_CHERRYVIEW(dev_priv)) @@ -6312,9 +6302,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, if (IS_G4X(dev_priv) || DISPLAY_VER(dev_priv) >= 5) PIPE_CONF_CHECK_I(pipe_bpp); - PIPE_CONF_CHECK_CLOCK_FUZZY(hw.pipe_mode.crtc_clock); - PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock); - PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock); + PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_clock); + PIPE_CONF_CHECK_I(port_clock); PIPE_CONF_CHECK_I(min_voltage_level); @@ -6358,7 +6348,6 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, #undef PIPE_CONF_CHECK_BOOL_INCOMPLETE #undef PIPE_CONF_CHECK_P #undef PIPE_CONF_CHECK_FLAGS -#undef PIPE_CONF_CHECK_CLOCK_FUZZY #undef PIPE_CONF_CHECK_COLOR_LUT #undef PIPE_CONF_CHECK_TIMINGS #undef PIPE_CONF_CHECK_RECT @@ -6379,8 +6368,7 @@ static void intel_pipe_config_sanity_check(struct drm_i915_private *dev_priv, * FDI already provided one idea for the dotclock. * Yell if the encoder disagrees. */ - drm_WARN(&dev_priv->drm, - !intel_fuzzy_clock_check(fdi_dotclock, dotclock), + drm_WARN(&dev_priv->drm, fdi_dotclock != dotclock, "FDI dotclock and encoder dotclock mismatch, fdi: %i, encoder: %i\n", fdi_dotclock, dotclock); }