@@ -1330,7 +1330,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_MSO(i915) (DISPLAY_VER(i915) >= 12)
-#define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
+#define HAS_RUNTIME_PM(dev_priv) (GRAPHICS_VER(dev_priv) >= 8 || \
+ IS_HASWELL(dev_priv) || \
+ IS_VALLEYVIEW(dev_priv))
#define HAS_64BIT_RELOC(dev_priv) (GRAPHICS_VER(dev_priv) >= 8)
#define HAS_MSLICES(dev_priv) \
@@ -501,7 +501,6 @@ static const struct intel_device_info vlv_info = {
.is_lp = 1,
.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
- .has_runtime_pm = 1,
.has_rps = true,
.display.has_gmch = 1,
.display.has_hotplug = 1,
@@ -525,8 +524,7 @@ static const struct intel_device_info vlv_info = {
.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
.display.has_fpga_dbg = 1, \
- HSW_PIPE_OFFSETS, \
- .has_runtime_pm = 1
+ HSW_PIPE_OFFSETS
#define HSW_PLATFORM \
G75_FEATURES, \
@@ -592,7 +590,6 @@ static const struct intel_device_info chv_info = {
.display.has_hotplug = 1,
.is_lp = 1,
.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
- .has_runtime_pm = 1,
.has_rps = true,
.has_logical_ring_contexts = 1,
.display.has_gmch = 1,
@@ -665,7 +662,6 @@ static const struct intel_device_info skl_gt4_info = {
.display.has_fpga_dbg = 1, \
.display.fbc_mask = BIT(INTEL_FBC_A), \
.display.has_hdcp = 1, \
- .has_runtime_pm = 1, \
.display.has_dmc = 1, \
.has_rps = true, \
.has_logical_ring_contexts = 1, \
@@ -955,7 +951,6 @@ static const struct intel_device_info adl_p_info = {
.has_logical_ring_contexts = 1, \
.has_mslices = 1, \
.has_rps = 1, \
- .has_runtime_pm = 1, \
.ppgtt_size = 48, \
.ppgtt_type = INTEL_PPGTT_FULL
@@ -147,7 +147,6 @@ enum intel_ppgtt_type {
func(has_mslices); \
func(has_pooled_eu); \
func(has_rps); \
- func(has_runtime_pm); \
func(has_snoop); \
func(has_coherent_ggtt); \
func(unfenced_needs_alignment); \
No need to have this parameter in intel_device_info struct as this feature is supported in Haswell, Valleyview and all platforms with graphics version 8 or newer. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 4 +++- drivers/gpu/drm/i915/i915_pci.c | 7 +------ drivers/gpu/drm/i915/intel_device_info.h | 1 - 3 files changed, 4 insertions(+), 8 deletions(-)