From patchwork Tue May 10 21:33:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 12845552 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02ED6C433EF for ; Tue, 10 May 2022 21:33:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8433710E174; Tue, 10 May 2022 21:33:34 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4040010E174; Tue, 10 May 2022 21:33:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652218413; x=1683754413; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bIlEdmCPlaX2gZe1NITcJ2yrFM0j4MtDdH8jCnz9COE=; b=GQzJ8uFVQyXfs8hKtKx24Iwp6+K3cu2faGbNkpeypeHmmal70wD+IPwx u1cf8V6SpmBorVJXB0NRW5V536I40fGm3C3YjQbbjQg95uh3p2+RR45Oz sChqVNeDDGkitDm3n2BCE0AUsqygV3ZO5q/LiMQ6B8ZQEL6CAVe7O8gtL sU145Gqs8JdHXWTyq002F9uvn1B4nK8k+ZJu9CBMwl8CWRr6WtGOYC4K3 I2BNPM5ME43dUfv9qK2HtOWMdlYagZ+4hfBHhKlgCdSHwf0RcrMWNa04E uh6CXFMNXwj7nFOLW8Z9sbZR04VqKVh5gqGzygjOnorJjuKs0siFaAyQ3 w==; X-IronPort-AV: E=McAfee;i="6400,9594,10343"; a="268350062" X-IronPort-AV: E=Sophos;i="5.91,215,1647327600"; d="scan'208";a="268350062" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2022 14:33:32 -0700 X-IronPort-AV: E=Sophos;i="5.91,215,1647327600"; d="scan'208";a="593769236" Received: from brauta-mobl1.ger.corp.intel.com (HELO intel.com) ([10.252.50.37]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2022 14:33:29 -0700 From: Andi Shyti To: Intel GFX , DRI Devel Date: Tue, 10 May 2022 23:33:02 +0200 Message-Id: <20220510213304.101055-2-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510213304.101055-1-andi.shyti@linux.intel.com> References: <20220510213304.101055-1-andi.shyti@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 1/3] drm/i915/gt: Ignore TLB invalidations on idle engines X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Auld , Chris Wilson Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Chris Wilson As an extension of the current skip TLB invalidations if the device is powered down, we recognised that prior to any engine activity, all the TLBs are explicitly invalidated. Thus anytime we know the engine is asleep, we can skip invalidating the TLBs on that engine. Signed-off-by: Chris Wilson Signed-off-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_pm.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h index bc898df7a48cc..2654133b39f22 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h @@ -55,6 +55,10 @@ static inline void intel_gt_pm_might_put(struct intel_gt *gt) for (tmp = 1, intel_gt_pm_get(gt); tmp; \ intel_gt_pm_put(gt), tmp = 0) +#define with_intel_gt_pm_if_awake(gt, wf) \ + for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \ + intel_gt_pm_put(gt), tmp = 0) + static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt) { return intel_wakeref_wait_for_idle(>->wakeref);