diff mbox series

[v2,3/3] drm/i915/gt: Skip TLB invalidation if the engine is not awake

Message ID 20220510213304.101055-4-andi.shyti@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series Clear TLB caches in all tiles when object is removed | expand

Commit Message

Andi Shyti May 10, 2022, 9:33 p.m. UTC
We want to check if the engine is awake first before invalidating
its cache.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
 drivers/gpu/drm/i915/gt/intel_gt.c | 3 +++
 1 file changed, 3 insertions(+)
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diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 034182f85501b..de26fbe6b71dd 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -1219,6 +1219,9 @@  void intel_gt_invalidate_tlbs(struct intel_gt *gt)
 		const unsigned int timeout_ms = 4;
 		struct reg_and_bit rb;
+		if (!intel_engine_pm_is_awake(engine))
+			continue;
 		rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
 		if (!i915_mmio_reg_offset(rb.reg))