diff mbox series

drm/i915: fix typos in comments

Message ID 20220521111145.81697-90-Julia.Lawall@inria.fr (mailing list archive)
State New, archived
Headers show
Series drm/i915: fix typos in comments | expand

Commit Message

Julia Lawall May 21, 2022, 11:11 a.m. UTC
Spelling mistakes (triple letters) in comments.
Detected with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>

---
 drivers/gpu/drm/i915/display/intel_color.c           |    2 +-
 drivers/gpu/drm/i915/display/intel_pps.c             |    2 +-
 drivers/gpu/drm/i915/gt/intel_execlists_submission.c |    2 +-
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c           |    2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

Comments

Jani Nikula May 24, 2022, 11:03 a.m. UTC | #1
On Sat, 21 May 2022, Julia Lawall <Julia.Lawall@inria.fr> wrote:
> Spelling mistakes (triple letters) in comments.
> Detected with the help of Coccinelle.
>
> Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>

Thanks, pushed to drm-intel-next.

BR,
Jani.

>
> ---
>  drivers/gpu/drm/i915/display/intel_color.c           |    2 +-
>  drivers/gpu/drm/i915/display/intel_pps.c             |    2 +-
>  drivers/gpu/drm/i915/gt/intel_execlists_submission.c |    2 +-
>  drivers/gpu/drm/i915/gt/uc/intel_guc_log.c           |    2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 34128c9c635c..a27ce874a9e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1638,7 +1638,7 @@ static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state)
>  	/*
>  	 * Enable 10bit gamma for D13
>  	 * ToDo: Extend to Logarithmic Gamma once the new UAPI
> -	 * is acccepted and implemented by a userspace consumer
> +	 * is accepted and implemented by a userspace consumer
>  	 */
>  	else if (DISPLAY_VER(i915) >= 13)
>  		gamma_mode |= GAMMA_MODE_MODE_10BIT;
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 5a598dd06039..4bc0563dde92 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -509,7 +509,7 @@ static void wait_panel_power_cycle(struct intel_dp *intel_dp)
>  
>  	drm_dbg_kms(&i915->drm, "Wait for panel power cycle\n");
>  
> -	/* take the difference of currrent time and panel power off time
> +	/* take the difference of current time and panel power off time
>  	 * and then make panel wait for t11_t12 if needed. */
>  	panel_power_on_time = ktime_get_boottime();
>  	panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->pps.panel_power_off_time);
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 86f7a9ac1c39..aa0d2bbbbcc4 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -1350,7 +1350,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
>  			 * submission. If we don't cancel the timer now,
>  			 * we will see that the timer has expired and
>  			 * reschedule the tasklet; continually until the
> -			 * next context switch or other preeemption event.
> +			 * next context switch or other preemption event.
>  			 *
>  			 * Since we have decided to reschedule based on
>  			 * consumption of this timeslice, if we submit the
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> index 78d2989fe917..02311ad90264 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> @@ -588,7 +588,7 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
>  	/*
>  	 * We require SSE 4.1 for fast reads from the GuC log buffer and
>  	 * it should be present on the chipsets supporting GuC based
> -	 * submisssions.
> +	 * submissions.
>  	 */
>  	if (!i915_has_memcpy_from_wc()) {
>  		ret = -ENXIO;
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 34128c9c635c..a27ce874a9e8 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1638,7 +1638,7 @@  static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state)
 	/*
 	 * Enable 10bit gamma for D13
 	 * ToDo: Extend to Logarithmic Gamma once the new UAPI
-	 * is acccepted and implemented by a userspace consumer
+	 * is accepted and implemented by a userspace consumer
 	 */
 	else if (DISPLAY_VER(i915) >= 13)
 		gamma_mode |= GAMMA_MODE_MODE_10BIT;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 5a598dd06039..4bc0563dde92 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -509,7 +509,7 @@  static void wait_panel_power_cycle(struct intel_dp *intel_dp)
 
 	drm_dbg_kms(&i915->drm, "Wait for panel power cycle\n");
 
-	/* take the difference of currrent time and panel power off time
+	/* take the difference of current time and panel power off time
 	 * and then make panel wait for t11_t12 if needed. */
 	panel_power_on_time = ktime_get_boottime();
 	panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->pps.panel_power_off_time);
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 86f7a9ac1c39..aa0d2bbbbcc4 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -1350,7 +1350,7 @@  static void execlists_dequeue(struct intel_engine_cs *engine)
 			 * submission. If we don't cancel the timer now,
 			 * we will see that the timer has expired and
 			 * reschedule the tasklet; continually until the
-			 * next context switch or other preeemption event.
+			 * next context switch or other preemption event.
 			 *
 			 * Since we have decided to reschedule based on
 			 * consumption of this timeslice, if we submit the
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index 78d2989fe917..02311ad90264 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -588,7 +588,7 @@  int intel_guc_log_relay_open(struct intel_guc_log *log)
 	/*
 	 * We require SSE 4.1 for fast reads from the GuC log buffer and
 	 * it should be present on the chipsets supporting GuC based
-	 * submisssions.
+	 * submissions.
 	 */
 	if (!i915_has_memcpy_from_wc()) {
 		ret = -ENXIO;