diff mbox series

[v2,8/9] drm/i915: Write watermarks for disabled pipes on gmch platforms

Message ID 20220622155452.32587-9-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups | expand

Commit Message

Ville Syrjälä June 22, 2022, 3:54 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We've excluded gmch platforms from writing the final watermarks
for any disabled pipe. IIRC the reason was perhaps some lingering
issue with the watermark merging across the pipes. But I can't
really see any reason for this anymore, so let's unify this behaviour.
The main benefit being more consistency in register dumps when
we don't have stale watermarks hanging around in the registers.
Functionally there should be no difference as the hardware just
ignore all of it when the pipe is disabled.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

Comments

Lisovskiy, Stanislav Oct. 7, 2022, 6:03 a.m. UTC | #1
On Wed, Jun 22, 2022 at 06:54:51PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We've excluded gmch platforms from writing the final watermarks
> for any disabled pipe. IIRC the reason was perhaps some lingering
> issue with the watermark merging across the pipes. But I can't
> really see any reason for this anymore, so let's unify this behaviour.
> The main benefit being more consistency in register dumps when
> we don't have stale watermarks hanging around in the registers.
> Functionally there should be no difference as the hardware just
> ignore all of it when the pipe is disabled.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 903226e2a626..2c5dadc62c55 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7192,9 +7192,7 @@ static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
>  	intel_fbc_disable(crtc);
>  	intel_disable_shared_dpll(old_crtc_state);
>  
> -	/* FIXME unify this for all platforms */
> -	if (!new_crtc_state->hw.active &&
> -	    !HAS_GMCH(dev_priv))
> +	if (!new_crtc_state->hw.active)
>  		intel_initial_watermarks(state, crtc);
>  }
>  
> -- 
> 2.35.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 903226e2a626..2c5dadc62c55 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7192,9 +7192,7 @@  static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
 	intel_fbc_disable(crtc);
 	intel_disable_shared_dpll(old_crtc_state);
 
-	/* FIXME unify this for all platforms */
-	if (!new_crtc_state->hw.active &&
-	    !HAS_GMCH(dev_priv))
+	if (!new_crtc_state->hw.active)
 		intel_initial_watermarks(state, crtc);
 }