diff mbox series

[4/9] drm/i915: Make pipe_offsets[] & co. u32

Message ID 20220623130900.26078-5-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Display info cleanup | expand

Commit Message

Ville Syrjälä June 23, 2022, 1:08 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Using a signed type for the register offsets doesn't really
make sense. Switch to u32.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_device_info.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index e3b40f5782a4..2be7ba78f123 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -242,9 +242,9 @@  struct intel_device_info {
 		u32 mmio_offset;
 
 		/* Register offsets for the various display pipes and transcoders */
-		int pipe_offsets[I915_MAX_TRANSCODERS];
-		int trans_offsets[I915_MAX_TRANSCODERS];
-		int cursor_offsets[I915_MAX_PIPES];
+		u32 pipe_offsets[I915_MAX_TRANSCODERS];
+		u32 trans_offsets[I915_MAX_TRANSCODERS];
+		u32 cursor_offsets[I915_MAX_PIPES];
 	} display;