From patchwork Wed Jul 6 11:43:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Usyskin X-Patchwork-Id: 12908024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 583E9C433EF for ; Wed, 6 Jul 2022 11:44:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9DA4F11A0B7; Wed, 6 Jul 2022 11:44:03 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id B1FF911A0B7 for ; Wed, 6 Jul 2022 11:44:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657107842; x=1688643842; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fMJWfltOfFJMxVswzKOrQgNi1Q52cAI5noW02Iljmjk=; b=AO/eKxBDmrNXUu6QchsiGl/4OKVEJK/CvukKXqUTF1ZVBeEGesKJ9xUU QaJOtRpwVDoILzBvKoCEuLAtFp/C+0vYNo6bPC0yPZ4ln6/l0y8WhQ5dX uN2n4oXfKf8gwKpZVjSnjyrkjch1XeztV38Wxsk/rQx9RaznVYqvXEseQ jlF2bJcC0n5Kl5T/XqTvhfH+xcNhOxOHhUd4ZXBCCaDGPDW2dRRlMXzz6 ycr9WMIe+RNf1ZUm/fVr0bIbYOm+vtVE0DL+snNjuZWl6PeRObvROUnLd PR0Wt+nAo8ZcvohnMhfyXob+iGRyHiEJt2BYb8s9W2wP598ZjpcZBCQT3 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10399"; a="284459493" X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="284459493" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2022 04:44:02 -0700 X-IronPort-AV: E=Sophos;i="5.92,249,1650956400"; d="scan'208";a="650630092" Received: from sannilnx.jer.intel.com ([10.12.26.175]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2022 04:43:59 -0700 From: Alexander Usyskin To: Greg Kroah-Hartman , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Daniel Vetter , Tvrtko Ursulin Date: Wed, 6 Jul 2022 14:43:32 +0300 Message-Id: <20220706114345.1128018-2-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220706114345.1128018-1-alexander.usyskin@intel.com> References: <20220706114345.1128018-1-alexander.usyskin@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 01/14] drm/i915/gsc: skip irq initialization if using polling X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, Alexander Usyskin , linux-kernel@vger.kernel.org, Tomas Winkler , Vitaly Lubart Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Vitaly Lubart Some platforms require the host to poll on the GSC registers instead of relaying on the interrupts. For those platforms, irq initialization should be skipped Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin Reviewed-by: Daniele Ceraolo Spurio --- drivers/gpu/drm/i915/gt/intel_gsc.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c b/drivers/gpu/drm/i915/gt/intel_gsc.c index 0e494028b81d..e0236ff1d072 100644 --- a/drivers/gpu/drm/i915/gt/intel_gsc.c +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c @@ -40,6 +40,7 @@ struct gsc_def { const char *name; unsigned long bar; size_t bar_size; + bool use_polling; }; /* gsc resources and definitions (HECI1 and HECI2) */ @@ -117,6 +118,10 @@ static void gsc_init_one(struct drm_i915_private *i915, return; } + /* skip irq initialization */ + if (def->use_polling) + goto add_device; + intf->irq = irq_alloc_desc(0); if (intf->irq < 0) { drm_err(&i915->drm, "gsc irq error %d\n", intf->irq); @@ -129,6 +134,7 @@ static void gsc_init_one(struct drm_i915_private *i915, goto fail; } +add_device: adev = kzalloc(sizeof(*adev), GFP_KERNEL); if (!adev) goto fail; @@ -182,10 +188,8 @@ static void gsc_irq_handler(struct intel_gt *gt, unsigned int intf_id) return; } - if (gt->gsc.intf[intf_id].irq < 0) { - drm_err_ratelimited(>->i915->drm, "GSC irq: irq not set"); + if (gt->gsc.intf[intf_id].irq < 0) return; - } ret = generic_handle_irq(gt->gsc.intf[intf_id].irq); if (ret)