From patchwork Fri Jul 8 21:58:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 12911906 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77958C433EF for ; Fri, 8 Jul 2022 21:58:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D46D310E9E3; Fri, 8 Jul 2022 21:58:12 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id C5BCA10E9E3 for ; Fri, 8 Jul 2022 21:58:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657317490; x=1688853490; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=okOQf276OfHOl6bL0rClj9FB5N72iR6Yki4txY5Cy9w=; b=mbBs4sm5nYFRj44fDC0O7hvMEugMDzDixaKRURTGWzFsZBCOhM8IHnDl 8b1bBIlSOzi4yeSxzfNhnkBkUxjqr4JPRYZJ9qRRxdG06LUmFZhiV7xAu oGfcQYnc1pyPU9TE1b33ommVxeKDHmhLLYpof7f/EV7GNHbOVMaJATmxA scHx8Wt7bu8l/o2WLWk71VGOY3iJa7xaXoVYSd/5NpU4ifpoxMzYN14Z0 wcf2Q9zcL8anfH7+xWBXzg1kSOZekK2tC1lAuaMQqgyhTcqlNJAbyQeTN x7twchbyIeddZXJsnzhJJYfBtw6675o2kxMgt06+Ph/FPfSOI8di6PqT/ g==; X-IronPort-AV: E=McAfee;i="6400,9594,10402"; a="281927124" X-IronPort-AV: E=Sophos;i="5.92,256,1650956400"; d="scan'208";a="281927124" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2022 14:58:10 -0700 X-IronPort-AV: E=Sophos;i="5.92,256,1650956400"; d="scan'208";a="651721143" Received: from mdroper-desk1.fm.intel.com ([10.1.27.134]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2022 14:58:10 -0700 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Fri, 8 Jul 2022 14:58:04 -0700 Message-Id: <20220708215804.2889246-2-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708215804.2889246-1-matthew.d.roper@intel.com> References: <20220708215804.2889246-1-matthew.d.roper@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Add Wa_14016291713 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We already disable FBC when PSR2 is enabled on display version 12 and above; this new workaround now requires that we do the same with PSR1 on display versions 12 and 13. Signed-off-by: Matt Roper Reviewed-by: Arun R Murthy --- drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 16537830ccf0..7436b35f7ea0 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1098,6 +1098,12 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state, return 0; } + /* Wa_14016291713 */ + if (IS_DISPLAY_VER(i915, 12, 13) && crtc_state->has_psr) { + plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)"; + return 0; + } + if (!pixel_format_is_valid(plane_state)) { plane_state->no_fbc_reason = "pixel format not supported"; return 0;