From patchwork Mon Sep 12 11:18:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 12973563 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73EF6ECAAD5 for ; Mon, 12 Sep 2022 11:18:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C671B10E3A7; Mon, 12 Sep 2022 11:18:26 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id D01F910E39B for ; Mon, 12 Sep 2022 11:18:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662981503; x=1694517503; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=pPqU9X7KrynXolwsVpK5cbnGQW+NDQfvS3Xfcc4sOJA=; b=bIsXUNEh4Z2hycPigEW+QLEYN80JX6QFLGTahIlbs2soQUMrcrUC84zp dXZ3BYCduLaM/HcKMNJwp9BjE/EZtbdeCQQ62d155HvkR8KNnNm5JOYmW OSZr3SmAJavp/vyYpY7od6bh6qIcAAZzHPXgaOwsbWh1SepTF3mR6oSmt Y+KkPq/isfM33hpEBPpVUGFL4o2fhxOJIZ7CVOUdH4KT4s9RqDp/S6EQQ XhWSlrkjhJ3Gq63pvwuPU8NZuZiRpOMXl3UT4vAAYa7sKhXIugFzHs3kt b8NJKjVj2Ei/OjbHrboxxQckDnD5nMlnC5MrkOyBW+atvr1Futi1WL4U5 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10467"; a="280858368" X-IronPort-AV: E=Sophos;i="5.93,310,1654585200"; d="scan'208";a="280858368" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Sep 2022 04:18:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,310,1654585200"; d="scan'208";a="678044002" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.191]) by fmsmga008.fm.intel.com with SMTP; 12 Sep 2022 04:18:21 -0700 Received: by stinkbox (sSMTP sendmail emulation); Mon, 12 Sep 2022 14:18:20 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Mon, 12 Sep 2022 14:18:01 +0300 Message-Id: <20220912111814.17466-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220912111814.17466-1-ville.syrjala@linux.intel.com> References: <20220912111814.17466-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 02/15] drm/i915: Clean up transcoder_to_stream_enc_status() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Drop the pointless middle man variable and just return the correct thing directly. And while at it change the return type to u32 since this is a register value we're returning. Signed-off-by: Ville Syrjälä Reviewed-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c index 88689124c013..35360dd543ac 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c @@ -19,28 +19,20 @@ #include "intel_hdcp.h" #include "intel_hdcp_regs.h" -static unsigned int transcoder_to_stream_enc_status(enum transcoder cpu_transcoder) +static u32 transcoder_to_stream_enc_status(enum transcoder cpu_transcoder) { - u32 stream_enc_mask; - switch (cpu_transcoder) { case TRANSCODER_A: - stream_enc_mask = HDCP_STATUS_STREAM_A_ENC; - break; + return HDCP_STATUS_STREAM_A_ENC; case TRANSCODER_B: - stream_enc_mask = HDCP_STATUS_STREAM_B_ENC; - break; + return HDCP_STATUS_STREAM_B_ENC; case TRANSCODER_C: - stream_enc_mask = HDCP_STATUS_STREAM_C_ENC; - break; + return HDCP_STATUS_STREAM_C_ENC; case TRANSCODER_D: - stream_enc_mask = HDCP_STATUS_STREAM_D_ENC; - break; + return HDCP_STATUS_STREAM_D_ENC; default: - stream_enc_mask = 0; + return 0; } - - return stream_enc_mask; } static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout)