From patchwork Thu Sep 15 20:39:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 12977785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6642BC32771 for ; Thu, 15 Sep 2022 20:40:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 52C9910E2C2; Thu, 15 Sep 2022 20:39:46 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 70E8610E2A7; Thu, 15 Sep 2022 20:39:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1663274381; x=1694810381; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=a2okYYf3N22zxuVaxoVucbTv60Zi/euA4v1EkwXBHVM=; b=ek8EbVoJG7MMy8J3RxL60mSweoFjC9YmhDTmH743OOAfchCnsmH0F2l4 leL1NKUbLF60oEqMXlr1a8lrp88gkVKTbrauQKa1YFGfm4MVWabyYSq4s wax4Lg2gDosI5/CR0bUVZl2j74SuCP4Q6kuOAjuMsTYCHro6KRBJ9Gfjy 0e8HPoIhPY1LT9gB4Xw0kWLsNeXpx2mgJF+0eqTVJJWqmsx107dR+LF/M REmod10HNiIWP0KPp4fktEsJCr1EujIjWSxSvjYmPEZAMkOXE/5RhYp6I oVAo40I8IGGJOyMKgMD3xTWvlcPrU6OsLgr/8od0U2i8an6brScLOWTfy Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10471"; a="300193624" X-IronPort-AV: E=Sophos;i="5.93,319,1654585200"; d="scan'208";a="300193624" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2022 13:39:40 -0700 X-IronPort-AV: E=Sophos;i="5.93,319,1654585200"; d="scan'208";a="647991378" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.143]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2022 13:39:40 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org, Lucas De Marchi Date: Thu, 15 Sep 2022 13:39:06 -0700 Message-Id: <20220915-stolen-v1-2-117c5f295bb2@intel.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220915-stolen-v1-0-117c5f295bb2@intel.com> References: <20220915-stolen-v1-0-117c5f295bb2@intel.com> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-bbe61 Subject: [Intel-gfx] [PATCH v1 2/4] drm/i915: Add missing mask when reading GEN12_DSMBASE X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tejas.upadhyay@intel.com, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" DSMBASE register is defined so BDSM bitfield contains the bits 63 to 20 of the base address of stolen. For the supported platforms bits 0-19 are zero but that may not be true in future. Add the missing mask. Signed-off-by: Lucas De Marchi Reviewed-by: Caz Yokoyama Reported-by: kernel test robot Reported-by: kernel test robot Acked-by: Aravind Iddamsetty diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c index 42f4769bb4ac..c34065fe2ecc 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c @@ -814,7 +814,7 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type, return ERR_PTR(-ENXIO); /* Use DSM base address instead for stolen memory */ - dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE); + dsm_base = intel_uncore_read64(uncore, GEN12_DSMBASE) & GEN12_BDSM_MASK; if (IS_DG1(uncore->i915)) { lmem_size = pci_resource_len(pdev, GEN12_LMEM_BAR); if (WARN_ON(lmem_size < dsm_base)) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1a9bd829fc7e..0301874c76ba 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7953,6 +7953,7 @@ enum skl_power_gate { #define GEN12_GSMBASE _MMIO(0x108100) #define GEN12_DSMBASE _MMIO(0x1080C0) +#define GEN12_BDSM_MASK GENMASK(63, 20) #define XEHP_CLOCK_GATE_DIS _MMIO(0x101014) #define SGSI_SIDECLK_DIS REG_BIT(17)