@@ -4493,7 +4493,6 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
encoder->update_complete = intel_ddi_update_complete;
}
- drm_WARN_ON(&dev_priv->drm, port > PORT_I);
dig_port->ddi_io_power_domain = intel_display_power_ddi_io_domain(dev_priv, port);
if (init_dp) {
@@ -212,18 +212,16 @@ enum port {
PORT_H,
PORT_I,
- /* tgl+ */
- PORT_TC1 = PORT_D,
+ /* Non-TypeC ports must be defined above */
+ PORT_TC1,
PORT_TC2,
PORT_TC3,
PORT_TC4,
PORT_TC5,
PORT_TC6,
- /* XE_LPD repositions D/E offsets and bitfields */
- PORT_D_XELPD = PORT_TC5,
+ PORT_D_XELPD,
PORT_E_XELPD,
-
I915_MAX_PORTS
};
@@ -170,6 +170,7 @@
#define _MMIO_CURSOR2(pipe, reg) _MMIO(INTEL_INFO(dev_priv)->display.cursor_offsets[(pipe)] - \
INTEL_INFO(dev_priv)->display.cursor_offsets[PIPE_A] + \
DISPLAY_MMIO_BASE(dev_priv) + (reg))
+#define _MMIO_DDI(i915, port, a, b) _MMIO_PORT(INTEL_INFO(i915)->display.ddi_index[port], a, b)
#define __MASKED_FIELD(mask, value) ((mask) << 16 | (value))
#define _MASKED_FIELD(mask, value) ({ \
@@ -6936,10 +6937,7 @@ enum skl_power_gate {
/* DDI Buffer Control */
#define _DDI_BUF_CTL_A 0x64000
#define _DDI_BUF_CTL_B 0x64100
-#define DDI_BUF_CTL(i915, port) ({ \
- (void)i915; /* Suppress unused variable warning */ \
- _MMIO_PORT(port, _DDI_BUF_CTL_A, _DDI_BUF_CTL_B); \
- })
+#define DDI_BUF_CTL(i915, port) _MMIO_DDI(i915, port, _DDI_BUF_CTL_A, _DDI_BUF_CTL_B)
#define DDI_BUF_CTL_ENABLE (1 << 31)
#define DDI_BUF_TRANS_SELECT(n) ((n) << 24)
@@ -7075,10 +7073,8 @@ enum skl_power_gate {
#define PORT_CLK_SEL_NONE REG_FIELD_PREP(PORT_CLK_SEL_MASK, 7)
/* On ICL+ this is the same as PORT_CLK_SEL, but all bits change. */
-#define DDI_CLK_SEL(i915, port) ({ \
- (void)i915; /* Suppress unused variable warning */ \
- PORT_CLK_SEL(port); \
- })
+#define DDI_CLK_SEL(i915, port) _MMIO_DDI(i915, port, _PORT_CLK_SEL_A, _PORT_CLK_SEL_B)
+
#define DDI_CLK_SEL_MASK REG_GENMASK(31, 28)
#define DDI_CLK_SEL_NONE REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0x0)
#define DDI_CLK_SEL_MG REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0x8)
@@ -35,7 +35,7 @@ enum i915_component_type {
/* MAX_PORT is the number of port
* It must be sync with I915_MAX_PORTS defined i915_drv.h
*/
-#define MAX_PORTS 9
+#define MAX_PORTS 17
/**
* struct i915_audio_component - Used for direct communication between i915 and hda drivers
With the index required for DDI register offset calculation available in the device info, the macros which used port enums to calculate the DDI register offsets i.e. DDI_BUF_CTL and DDI_CLK_SEL are updated to make use of the index rather than enum directly. Any new macros access that DDI registers should follow the same procedure. This would free the port enums from tied to the register offset of DDI registers. We can remove all the enum aliases and clean up the enum definitions. The key target of the patch series to remove platform specific definitions of ports like PORT_D_XELPD, PORT_E_XELPD is not yet covered here. The definitions are still retained and will be handled in the follow patch. Removed a WARN_ON as it is no longer valid. The WARN was added in the commit "327f8d8c336d drm/i915: simplify setting of ddi_io_power_domain" The ddi_io_power_domain calculation has changed completely since the commit and doesn't need this WARN_ON anymore. Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 1 - drivers/gpu/drm/i915/display/intel_display.h | 8 +++----- drivers/gpu/drm/i915/i915_reg.h | 12 ++++-------- include/drm/i915_component.h | 2 +- 4 files changed, 8 insertions(+), 15 deletions(-)