diff mbox series

[v2,7/7] drm/i915/pxp: Make intel_pxp power management implicitly sort PXP-owning-GT

Message ID 20221006043834.606220-8-alan.previn.teres.alexis@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/pxp: Prepare intel_pxp entry points for MTL | expand

Commit Message

Alan Previn Oct. 6, 2022, 4:38 a.m. UTC 
Make PXP suspend/ resume functions implicitly verify if the caller
is the PXP-owning-GT. PXP control structure still hangs off the intel_gt
structure that manages has gt-level power management events. Thus change
the input param to intel_gt structure and let PXP implicitly take the
expected action only if triggered from the PXP-owning-GT.

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.c   | 10 +++---
 drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 44 ++++++++++++++++++++-----
 drivers/gpu/drm/i915/pxp/intel_pxp_pm.h | 22 ++++++-------
 3 files changed, 51 insertions(+), 25 deletions(-)

Comments

Alan Previn Oct. 21, 2022, 4:29 p.m. UTC | #1 
with the removal of pxptee_iface_owner and the separation of a global-pxp check vs a per-gt pxp (is enabled) check, this
patch will get dropped as the latter change would appear in earlier in the series

On Wed, 2022-10-05 at 21:38 -0700, Alan Previn wrote:
> pxptee_iface_owner
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index f553e2173bda..0f477dfb392d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -276,7 +276,7 @@  int intel_gt_resume(struct intel_gt *gt)
 
 	intel_uc_resume(&gt->uc);
 
-	intel_pxp_resume(&gt->pxp);
+	intel_pxp_resume(gt);
 
 	user_forcewake(gt, false);
 
@@ -312,7 +312,7 @@  void intel_gt_suspend_prepare(struct intel_gt *gt)
 	user_forcewake(gt, true);
 	wait_for_suspend(gt);
 
-	intel_pxp_suspend_prepare(&gt->pxp);
+	intel_pxp_suspend_prepare(gt);
 }
 
 static suspend_state_t pm_suspend_target(void)
@@ -337,7 +337,7 @@  void intel_gt_suspend_late(struct intel_gt *gt)
 	GEM_BUG_ON(gt->awake);
 
 	intel_uc_suspend(&gt->uc);
-	intel_pxp_suspend(&gt->pxp);
+	intel_pxp_suspend(gt);
 
 	/*
 	 * On disabling the device, we want to turn off HW access to memory
@@ -365,7 +365,7 @@  void intel_gt_suspend_late(struct intel_gt *gt)
 
 void intel_gt_runtime_suspend(struct intel_gt *gt)
 {
-	intel_pxp_runtime_suspend(&gt->pxp);
+	intel_pxp_runtime_suspend(gt);
 	intel_uc_runtime_suspend(&gt->uc);
 
 	GT_TRACE(gt, "\n");
@@ -383,7 +383,7 @@  int intel_gt_runtime_resume(struct intel_gt *gt)
 	if (ret)
 		return ret;
 
-	intel_pxp_runtime_resume(&gt->pxp);
+	intel_pxp_runtime_resume(gt);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
index 5f713ac5c3ce..81e03c4eea71 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c
@@ -9,34 +9,54 @@ 
 #include "intel_pxp_session.h"
 #include "i915_drv.h"
 
-void intel_pxp_suspend_prepare(struct intel_pxp *pxp)
+void intel_pxp_suspend_prepare(struct intel_gt *gt)
 {
-	if (!intel_pxp_is_enabled(pxp_to_gt(pxp)->i915))
+	struct intel_pxp *pxp;
+
+	if (!intel_pxp_is_enabled(gt->i915))
+		return;
+
+	if (!gt->pxptee_iface_owner)
 		return;
 
+	pxp = &gt->pxp;
+
 	pxp->arb_is_valid = false;
 
 	intel_pxp_invalidate(pxp);
 }
 
-void intel_pxp_suspend(struct intel_pxp *pxp)
+void intel_pxp_suspend(struct intel_gt *gt)
 {
+	struct intel_pxp *pxp;
 	intel_wakeref_t wakeref;
 
-	if (!intel_pxp_is_enabled(pxp_to_gt(pxp)->i915))
+	if (!intel_pxp_is_enabled(gt->i915))
 		return;
 
-	with_intel_runtime_pm(&pxp_to_gt(pxp)->i915->runtime_pm, wakeref) {
+	if (!gt->pxptee_iface_owner)
+		return;
+
+	pxp = &gt->pxp;
+
+	with_intel_runtime_pm(&gt->i915->runtime_pm, wakeref) {
 		intel_pxp_fini_hw(pxp);
 		pxp->hw_state_invalidated = false;
 	}
 }
 
-void intel_pxp_resume(struct intel_pxp *pxp)
+void intel_pxp_resume(struct intel_gt *gt)
 {
-	if (!intel_pxp_is_enabled(pxp_to_gt(pxp)->i915))
+	struct intel_pxp *pxp;
+
+	if (!intel_pxp_is_enabled(gt->i915))
+		return;
+
+	if (!gt->pxptee_iface_owner)
 		return;
 
+	pxp = &gt->pxp;
+
 	/*
 	 * The PXP component gets automatically unbound when we go into S3 and
 	 * re-bound after we come out, so in that scenario we can defer the
@@ -48,11 +68,17 @@  void intel_pxp_resume(struct intel_pxp *pxp)
 	intel_pxp_init_hw(pxp);
 }
 
-void intel_pxp_runtime_suspend(struct intel_pxp *pxp)
+void intel_pxp_runtime_suspend(struct intel_gt *gt)
 {
-	if (!intel_pxp_is_enabled(pxp_to_gt(pxp)->i915))
+	struct intel_pxp *pxp;
+
+	if (!intel_pxp_is_enabled(gt->i915))
+		return;
+
+	if (!gt->pxptee_iface_owner)
 		return;
 
+	pxp = &gt->pxp;
 	pxp->arb_is_valid = false;
 
 	intel_pxp_fini_hw(pxp);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h
index 586be769104f..c87d54699793 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.h
@@ -6,32 +6,32 @@ 
 #ifndef __INTEL_PXP_PM_H__
 #define __INTEL_PXP_PM_H__
 
-struct intel_pxp;
+struct intel_gt;
 
 #ifdef CONFIG_DRM_I915_PXP
-void intel_pxp_suspend_prepare(struct intel_pxp *pxp);
-void intel_pxp_suspend(struct intel_pxp *pxp);
-void intel_pxp_resume(struct intel_pxp *pxp);
-void intel_pxp_runtime_suspend(struct intel_pxp *pxp);
+void intel_pxp_suspend_prepare(struct intel_gt *gt);
+void intel_pxp_suspend(struct intel_gt *gt);
+void intel_pxp_resume(struct intel_gt *gt);
+void intel_pxp_runtime_suspend(struct intel_gt *gt);
 #else
-static inline void intel_pxp_suspend_prepare(struct intel_pxp *pxp)
+static inline void intel_pxp_suspend_prepare(struct intel_gt *gt)
 {
 }
 
-static inline void intel_pxp_suspend(struct intel_pxp *pxp)
+static inline void intel_pxp_suspend(struct intel_gt *gt)
 {
 }
 
-static inline void intel_pxp_resume(struct intel_pxp *pxp)
+static inline void intel_pxp_resume(struct intel_gt *gt)
 {
 }
 
-static inline void intel_pxp_runtime_suspend(struct intel_pxp *pxp)
+static inline void intel_pxp_runtime_suspend(struct intel_gt *gt)
 {
 }
 #endif
-static inline void intel_pxp_runtime_resume(struct intel_pxp *pxp)
+static inline void intel_pxp_runtime_resume(struct intel_gt *gt)
 {
-	intel_pxp_resume(pxp);
+	intel_pxp_resume(gt);
 }
 #endif /* __INTEL_PXP_PM_H__ */