| Message ID | 20221031115452.1813981-1-anshuman.gupta@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/selftest: Fix gt_pm live_gt_clocks test | expand |
diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c index be94f863bdef..4f299590ae62 100644 --- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c @@ -50,8 +50,8 @@ static void measure_clocks(struct intel_engine_cs *engine, udelay(1000); - dt[i] = ktime_sub(ktime_get(), dt[i]); cycles[i] += ENGINE_READ_FW(engine, RING_TIMESTAMP); + dt[i] = ktime_sub(ktime_get(), dt[i]); local_irq_enable(); }
While reading the engine timestamps there can be uncontrollable concurrent mmio access via other i915 child drivers and by GuC, which may cause mmio latency to read the engine timestamps, Account such latency to calculate time to read engine timestamp. Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)