| Message ID | 20221103060222.23054-1-swati2.sharma@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/dsc: Add is_dsc_supported() | expand |
On Thu, Nov 03, 2022 at 11:32:22AM +0530, Swati Sharma wrote: > Lets use RUNTIME_INFO->has_dsc since platforms supporting dsc has this > flag enabled. > > This is done based on the review comments received on > https://patchwork.freedesktop.org/patch/509393/ > > Signed-off-by: Swati Sharma <swati2.sharma@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 6 +++--- > drivers/gpu/drm/i915/display/intel_vdsc.c | 7 ++++++- > drivers/gpu/drm/i915/display/intel_vdsc.h | 2 ++ > 3 files changed, 11 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 7400d6b4c587..eb908da80f2b 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1012,7 +1012,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, > * Output bpp is stored in 6.4 format so right shift by 4 to get the > * integer value since we support only integer values of bpp. > */ > - if (DISPLAY_VER(dev_priv) >= 10 && > + if (is_dsc_supported(dev_priv) && > drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { > /* > * TBD pass the connector BPC, > @@ -2906,7 +2906,7 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) > intel_dp_set_max_sink_lane_count(intel_dp); > > /* Read the eDP DSC DPCD registers */ > - if (DISPLAY_VER(dev_priv) >= 10) > + if (is_dsc_supported(dev_priv)) > intel_dp_get_dsc_sink_cap(intel_dp); > > /* > @@ -4691,7 +4691,7 @@ intel_dp_detect(struct drm_connector *connector, > } > > /* Read DP Sink DSC Cap DPCD regs for DP v1.4 */ > - if (DISPLAY_VER(dev_priv) >= 11) > + if (is_dsc_supported(dev_priv)) > intel_dp_get_dsc_sink_cap(intel_dp); > > intel_dp_configure_mst(intel_dp); > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c > index 269f9792390d..e7c1169538da 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > @@ -338,13 +338,18 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp, > return &rc_parameters[row_index][column_index]; > } > > +bool is_dsc_supported(struct drm_i915_private *dev_priv) > +{ > + return RUNTIME_INFO(dev_priv)->has_dsc; > +} > + > bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) > { > const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > struct drm_i915_private *i915 = to_i915(crtc->base.dev); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > > - if (!RUNTIME_INFO(i915)->has_dsc) > + if (!is_dsc_supported(i915)) > return false; > > if (DISPLAY_VER(i915) >= 12) In Runtime info, Gen 12 should have Gen 11 runtime has dsc set, so makes this check here redundant. Manasi > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h > index 8763f00fa7e2..049e8b95fdde 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.h > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h > @@ -12,7 +12,9 @@ enum transcoder; > struct intel_crtc; > struct intel_crtc_state; > struct intel_encoder; > +struct drm_i915_private; > > +bool is_dsc_supported(struct drm_i915_private *dev_priv); > bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state); > void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state); > void intel_dsc_enable(const struct intel_crtc_state *crtc_state); > -- > 2.25.1 >
On Thu, 03 Nov 2022, "Navare, Manasi" <manasi.d.navare@intel.com> wrote: > On Thu, Nov 03, 2022 at 11:32:22AM +0530, Swati Sharma wrote: >> Lets use RUNTIME_INFO->has_dsc since platforms supporting dsc has this >> flag enabled. >> >> This is done based on the review comments received on >> https://patchwork.freedesktop.org/patch/509393/ I don't think that's necessary. If it were an idea worth crediting, the usual way is using Suggested-by: tag. >> >> Signed-off-by: Swati Sharma <swati2.sharma@intel.com> >> --- >> drivers/gpu/drm/i915/display/intel_dp.c | 6 +++--- >> drivers/gpu/drm/i915/display/intel_vdsc.c | 7 ++++++- >> drivers/gpu/drm/i915/display/intel_vdsc.h | 2 ++ >> 3 files changed, 11 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c >> index 7400d6b4c587..eb908da80f2b 100644 >> --- a/drivers/gpu/drm/i915/display/intel_dp.c >> +++ b/drivers/gpu/drm/i915/display/intel_dp.c >> @@ -1012,7 +1012,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, >> * Output bpp is stored in 6.4 format so right shift by 4 to get the >> * integer value since we support only integer values of bpp. >> */ >> - if (DISPLAY_VER(dev_priv) >= 10 && >> + if (is_dsc_supported(dev_priv) && >> drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { >> /* >> * TBD pass the connector BPC, >> @@ -2906,7 +2906,7 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) >> intel_dp_set_max_sink_lane_count(intel_dp); >> >> /* Read the eDP DSC DPCD registers */ >> - if (DISPLAY_VER(dev_priv) >= 10) >> + if (is_dsc_supported(dev_priv)) >> intel_dp_get_dsc_sink_cap(intel_dp); >> >> /* >> @@ -4691,7 +4691,7 @@ intel_dp_detect(struct drm_connector *connector, >> } >> >> /* Read DP Sink DSC Cap DPCD regs for DP v1.4 */ >> - if (DISPLAY_VER(dev_priv) >= 11) >> + if (is_dsc_supported(dev_priv)) >> intel_dp_get_dsc_sink_cap(intel_dp); >> >> intel_dp_configure_mst(intel_dp); >> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c >> index 269f9792390d..e7c1169538da 100644 >> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c >> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c >> @@ -338,13 +338,18 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp, >> return &rc_parameters[row_index][column_index]; >> } >> >> +bool is_dsc_supported(struct drm_i915_private *dev_priv) >> +{ >> + return RUNTIME_INFO(dev_priv)->has_dsc; >> +} >> + All of the wrappers to runtime/device info members are of the form: #define HAS_DSC(__i915) (RUNTIME_INFO(__i915)->has_dsc) in i915_drv.h. >> bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) >> { >> const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); >> struct drm_i915_private *i915 = to_i915(crtc->base.dev); >> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; >> >> - if (!RUNTIME_INFO(i915)->has_dsc) >> + if (!is_dsc_supported(i915)) >> return false; >> >> if (DISPLAY_VER(i915) >= 12) > > In Runtime info, Gen 12 should have Gen 11 runtime has dsc set, so makes > this check here redundant. As it is, it's not redundant. It's tied to the transcoder check. But this could be simplified as: if (!HAS_DSC(i915)) return false; if (DISPLAY_VER(i915) == 11 && cpu_transcoder == TRANSCODER_A) return false; return true; It could be condenced even further, but at the const of losing clarity. BR, Jani. > > Manasi > >> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h >> index 8763f00fa7e2..049e8b95fdde 100644 >> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h >> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h >> @@ -12,7 +12,9 @@ enum transcoder; >> struct intel_crtc; >> struct intel_crtc_state; >> struct intel_encoder; >> +struct drm_i915_private; >> >> +bool is_dsc_supported(struct drm_i915_private *dev_priv); >> bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state); >> void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state); >> void intel_dsc_enable(const struct intel_crtc_state *crtc_state); >> -- >> 2.25.1 >>
Thanks Jani/Manasi for the review comments. Have addressed those in https://patchwork.freedesktop.org/patch/511033/ On 04-Nov-22 3:58 PM, Jani Nikula wrote: > On Thu, 03 Nov 2022, "Navare, Manasi" <manasi.d.navare@intel.com> wrote: >> On Thu, Nov 03, 2022 at 11:32:22AM +0530, Swati Sharma wrote: >>> Lets use RUNTIME_INFO->has_dsc since platforms supporting dsc has this >>> flag enabled. >>> >>> This is done based on the review comments received on >>> https://patchwork.freedesktop.org/patch/509393/ > > I don't think that's necessary. If it were an idea worth crediting, the > usual way is using Suggested-by: tag. > >>> >>> Signed-off-by: Swati Sharma <swati2.sharma@intel.com> >>> --- >>> drivers/gpu/drm/i915/display/intel_dp.c | 6 +++--- >>> drivers/gpu/drm/i915/display/intel_vdsc.c | 7 ++++++- >>> drivers/gpu/drm/i915/display/intel_vdsc.h | 2 ++ >>> 3 files changed, 11 insertions(+), 4 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c >>> index 7400d6b4c587..eb908da80f2b 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_dp.c >>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c >>> @@ -1012,7 +1012,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, >>> * Output bpp is stored in 6.4 format so right shift by 4 to get the >>> * integer value since we support only integer values of bpp. >>> */ >>> - if (DISPLAY_VER(dev_priv) >= 10 && >>> + if (is_dsc_supported(dev_priv) && >>> drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { >>> /* >>> * TBD pass the connector BPC, >>> @@ -2906,7 +2906,7 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) >>> intel_dp_set_max_sink_lane_count(intel_dp); >>> >>> /* Read the eDP DSC DPCD registers */ >>> - if (DISPLAY_VER(dev_priv) >= 10) >>> + if (is_dsc_supported(dev_priv)) >>> intel_dp_get_dsc_sink_cap(intel_dp); >>> >>> /* >>> @@ -4691,7 +4691,7 @@ intel_dp_detect(struct drm_connector *connector, >>> } >>> >>> /* Read DP Sink DSC Cap DPCD regs for DP v1.4 */ >>> - if (DISPLAY_VER(dev_priv) >= 11) >>> + if (is_dsc_supported(dev_priv)) >>> intel_dp_get_dsc_sink_cap(intel_dp); >>> >>> intel_dp_configure_mst(intel_dp); >>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c >>> index 269f9792390d..e7c1169538da 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c >>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c >>> @@ -338,13 +338,18 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp, >>> return &rc_parameters[row_index][column_index]; >>> } >>> >>> +bool is_dsc_supported(struct drm_i915_private *dev_priv) >>> +{ >>> + return RUNTIME_INFO(dev_priv)->has_dsc; >>> +} >>> + > > All of the wrappers to runtime/device info members are of the form: > > #define HAS_DSC(__i915) (RUNTIME_INFO(__i915)->has_dsc) > > in i915_drv.h. > >>> bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) >>> { >>> const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); >>> struct drm_i915_private *i915 = to_i915(crtc->base.dev); >>> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; >>> >>> - if (!RUNTIME_INFO(i915)->has_dsc) >>> + if (!is_dsc_supported(i915)) >>> return false; >>> >>> if (DISPLAY_VER(i915) >= 12) >> >> In Runtime info, Gen 12 should have Gen 11 runtime has dsc set, so makes >> this check here redundant. > > As it is, it's not redundant. It's tied to the transcoder check. > > But this could be simplified as: > > if (!HAS_DSC(i915)) > return false; > > if (DISPLAY_VER(i915) == 11 && cpu_transcoder == TRANSCODER_A) > return false; > > return true; > > It could be condenced even further, but at the const of losing clarity. > > BR, > Jani. > > >> >> Manasi >> >>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h >>> index 8763f00fa7e2..049e8b95fdde 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h >>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h >>> @@ -12,7 +12,9 @@ enum transcoder; >>> struct intel_crtc; >>> struct intel_crtc_state; >>> struct intel_encoder; >>> +struct drm_i915_private; >>> >>> +bool is_dsc_supported(struct drm_i915_private *dev_priv); >>> bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state); >>> void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state); >>> void intel_dsc_enable(const struct intel_crtc_state *crtc_state); >>> -- >>> 2.25.1 >>> >
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 7400d6b4c587..eb908da80f2b 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1012,7 +1012,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, * Output bpp is stored in 6.4 format so right shift by 4 to get the * integer value since we support only integer values of bpp. */ - if (DISPLAY_VER(dev_priv) >= 10 && + if (is_dsc_supported(dev_priv) && drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) { /* * TBD pass the connector BPC, @@ -2906,7 +2906,7 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp) intel_dp_set_max_sink_lane_count(intel_dp); /* Read the eDP DSC DPCD registers */ - if (DISPLAY_VER(dev_priv) >= 10) + if (is_dsc_supported(dev_priv)) intel_dp_get_dsc_sink_cap(intel_dp); /* @@ -4691,7 +4691,7 @@ intel_dp_detect(struct drm_connector *connector, } /* Read DP Sink DSC Cap DPCD regs for DP v1.4 */ - if (DISPLAY_VER(dev_priv) >= 11) + if (is_dsc_supported(dev_priv)) intel_dp_get_dsc_sink_cap(intel_dp); intel_dp_configure_mst(intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index 269f9792390d..e7c1169538da 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -338,13 +338,18 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp, return &rc_parameters[row_index][column_index]; } +bool is_dsc_supported(struct drm_i915_private *dev_priv) +{ + return RUNTIME_INFO(dev_priv)->has_dsc; +} + bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) { const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - if (!RUNTIME_INFO(i915)->has_dsc) + if (!is_dsc_supported(i915)) return false; if (DISPLAY_VER(i915) >= 12) diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h index 8763f00fa7e2..049e8b95fdde 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.h +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h @@ -12,7 +12,9 @@ enum transcoder; struct intel_crtc; struct intel_crtc_state; struct intel_encoder; +struct drm_i915_private; +bool is_dsc_supported(struct drm_i915_private *dev_priv); bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state); void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state); void intel_dsc_enable(const struct intel_crtc_state *crtc_state);
Lets use RUNTIME_INFO->has_dsc since platforms supporting dsc has this flag enabled. This is done based on the review comments received on https://patchwork.freedesktop.org/patch/509393/ Signed-off-by: Swati Sharma <swati2.sharma@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 6 +++--- drivers/gpu/drm/i915/display/intel_vdsc.c | 7 ++++++- drivers/gpu/drm/i915/display/intel_vdsc.h | 2 ++ 3 files changed, 11 insertions(+), 4 deletions(-)