| Message ID | 20221117003018.1433115-3-alan.previn.teres.alexis@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/pxp: Prepare intel_pxp entry points for MTL | expand |
On Wed, Nov 16, 2022 at 04:30:14PM -0800, Alan Previn wrote: > Make intel_pxp_is_enabled a global check and implicitly find the > PXP-owning-GT. > > PXP feature support is a device-config flag. In preparation for MTL > PXP control-context shall reside on of the two GT's. That said, > update intel_pxp_is_enabled to take in i915 as its input and internally > find the right gt to check if PXP is enabled so its transparent to > callers of this functions. > > However we also need to expose the per-gt variation of this internal > pxp files to use (like what intel_pxp_enabled was prior) so also expose > a new intel_gtpxp_is_enabled function for replacement. > > Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- > drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp.c | 28 ++++++++++++++++++-- > drivers/gpu/drm/i915/pxp/intel_pxp.h | 4 ++- > drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 8 +++--- > drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 4 +-- > 9 files changed, 40 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c > index 7f2831efc798..c123f4847b19 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > @@ -257,7 +257,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915, > > if (!protected) { > pc->uses_protected_content = false; > - } else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) { > + } else if (!intel_pxp_is_enabled(i915)) { if we are asking about pxp we should pass pxp, not i915... > ret = -ENODEV; > } else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) || > !(pc->user_flags & BIT(UCONTEXT_BANNABLE))) { > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c > index 33673fe7ee0a..e44803f9bec4 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c > @@ -384,7 +384,7 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data > if (ext.flags) > return -EINVAL; > > - if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp)) > + if (!intel_pxp_is_enabled(ext_data->i915)) > return -ENODEV; > > ext_data->flags |= I915_BO_PROTECTED; > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c > index d993e752bd36..88105101af79 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c > @@ -9,6 +9,7 @@ > #include "intel_pxp_tee.h" > #include "gem/i915_gem_context.h" > #include "gt/intel_context.h" > +#include "gt/intel_gt.h" > #include "i915_drv.h" > > /** > @@ -58,11 +59,34 @@ bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp) > INTEL_INFO((pxp_to_gt(pxp))->i915)->has_pxp && VDBOX_MASK(pxp_to_gt(pxp))); > } > > -bool intel_pxp_is_enabled(const struct intel_pxp *pxp) > +bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp) > { > return pxp->ce; > } > > +static struct intel_gt *i915_to_pxp_gt(struct drm_i915_private *i915) > +{ > + struct intel_gt *gt = NULL; > + int i = 0; > + > + for_each_gt(gt, i915, i) { > + /* There can be only one GT that supports PXP */ > + if (intel_pxp_supported_on_gt(>->pxp)) > + return gt; > + } > + return NULL; > +} > + > +bool intel_pxp_is_enabled(struct drm_i915_private *i915) > +{ > + struct intel_gt *gt = i915_to_pxp_gt(i915); > + > + if (!gt) > + return false; > + > + return intel_pxp_is_enabled_on_gt(>->pxp); > +} > + > bool intel_pxp_is_active(const struct intel_pxp *pxp) > { > return pxp->arb_is_valid; > @@ -216,7 +240,7 @@ int intel_pxp_start(struct intel_pxp *pxp) > { > int ret = 0; > > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return -ENODEV; > > if (wait_for(pxp_component_bound(pxp), 250)) > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h > index efa83f9d5e24..3f71b1653f74 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h > @@ -11,12 +11,14 @@ > > struct intel_pxp; > struct drm_i915_gem_object; > +struct drm_i915_private; > > struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp); > > bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp); > > -bool intel_pxp_is_enabled(const struct intel_pxp *pxp); > +bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp); > +bool intel_pxp_is_enabled(struct drm_i915_private *i915); > bool intel_pxp_is_active(const struct intel_pxp *pxp); > > void intel_pxp_init(struct intel_pxp *pxp); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c > index f41e45763d0d..f322a49ebadc 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c > @@ -99,7 +99,7 @@ int intel_pxp_terminate_session(struct intel_pxp *pxp, u32 id) > u32 *cs; > int err = 0; > > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return 0; > > rq = i915_request_create(ce); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > index f0ad6f34624a..4d257055434b 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > @@ -18,7 +18,7 @@ static int pxp_info_show(struct seq_file *m, void *data) > { > struct intel_pxp *pxp = m->private; > struct drm_printer p = drm_seq_file_printer(m); > - bool enabled = intel_pxp_is_enabled(pxp); > + bool enabled = intel_pxp_is_enabled_on_gt(pxp); > > if (!enabled) { > drm_printf(&p, "pxp disabled\n"); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > index c28be430718a..d3c697bf9aab 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > @@ -22,7 +22,7 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir) > { > struct intel_gt *gt = pxp_to_gt(pxp); > > - if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp))) > + if (GEM_WARN_ON(!intel_pxp_is_enabled_on_gt(pxp))) > return; > > lockdep_assert_held(gt->irq_lock); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c > index 6a7d4e2ee138..19ac8828cbde 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c > @@ -11,7 +11,7 @@ > > void intel_pxp_suspend_prepare(struct intel_pxp *pxp) > { > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return; > > pxp->arb_is_valid = false; > @@ -23,7 +23,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp) > { > intel_wakeref_t wakeref; > > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return; > > with_intel_runtime_pm(&pxp_to_gt(pxp)->i915->runtime_pm, wakeref) { > @@ -34,7 +34,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp) > > void intel_pxp_resume(struct intel_pxp *pxp) > { > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return; > > /* > @@ -50,7 +50,7 @@ void intel_pxp_resume(struct intel_pxp *pxp) > > void intel_pxp_runtime_suspend(struct intel_pxp *pxp) > { > - if (!intel_pxp_is_enabled(pxp)) > + if (!intel_pxp_is_enabled_on_gt(pxp)) > return; > > pxp->arb_is_valid = false; > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > index b0c9170b1395..a5c9c692c20d 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > @@ -152,7 +152,7 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev, > return 0; > > /* the component is required to fully start the PXP HW */ > - if (intel_pxp_is_enabled(pxp)) > + if (intel_pxp_is_enabled_on_gt(pxp)) > intel_pxp_init_hw(pxp); > > intel_runtime_pm_put(&i915->runtime_pm, wakeref); > @@ -167,7 +167,7 @@ static void i915_pxp_tee_component_unbind(struct device *i915_kdev, > struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev); > intel_wakeref_t wakeref; > > - if (intel_pxp_is_enabled(pxp)) > + if (intel_pxp_is_enabled_on_gt(pxp)) > with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref) > intel_pxp_fini_hw(pxp); > > -- > 2.34.1 >
On Thu, 2022-11-17 at 11:04 -0500, Vivi, Rodrigo wrote: > On Wed, Nov 16, 2022 at 04:30:14PM -0800, Alan Previn wrote: > > Make intel_pxp_is_enabled a global check and implicitly find the > > PXP-owning-GT. > > > > PXP feature support is a device-config flag. In preparation for MTL > > PXP control-context shall reside on of the two GT's. That said, > > update intel_pxp_is_enabled to take in i915 as its input and internally > > find the right gt to check if PXP is enabled so its transparent to > > callers of this functions. > > > > However we also need to expose the per-gt variation of this internal > > pxp files to use (like what intel_pxp_enabled was prior) so also expose > > a new intel_gtpxp_is_enabled function for replacement. > > > > Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> > > --- > > drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- > > drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +- > > drivers/gpu/drm/i915/pxp/intel_pxp.c | 28 ++++++++++++++++++-- > > drivers/gpu/drm/i915/pxp/intel_pxp.h | 4 ++- > > drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 2 +- > > drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 2 +- > > drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 2 +- > > drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 8 +++--- > > drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 4 +-- > > 9 files changed, 40 insertions(+), 14 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c > > index 7f2831efc798..c123f4847b19 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > > @@ -257,7 +257,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915, > > > > if (!protected) { > > pc->uses_protected_content = false; > > - } else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) { > > + } else if (!intel_pxp_is_enabled(i915)) { > > if we are asking about pxp we should pass pxp, not i915... > > The function is being called by gem-exec / gem-context / gem-create about the availibility of this feature globally. I had previously discussed this with Daniele with the goal to have 2 versions (one a wrapper over the other) where u can query "is the pxp feature available on this hw?" vs "does this gt have the enabled pxp controls"? where the latter is more for internal PXP usage while the former is for external (gem-exec, gem-context, etc). So the naming above was decided by Daniele. Or perhaps this might work better? Another direction is to have the external callers not change at all (so gem-exec would continue call with either the render-gt-pxp or the media-gt-pxp and have the internal subsystem sort out which is the correct subsystem. Internally in our display code, when we have shared functions like clocks, buffers and such where i've seen code that takes in the caller's crtc the top level and then internally parse across all crtcs to take the proper global actions (where sometimes the control unit might reside on only 1 crtc). Actually, this was where rev1 was originally heading but Daniele said that was convoluted (the internal rerouting from callers gt-pxp to the correct gt-pxp). Respectfully and humbly, i would like to request where is the coding guideline for function naming when u have 2nd level subsystem IPs owning control over global hw features so that we dont need to have this back and forth of conflicting direction from different reviewers especially so long after initial reviews have started. (internally reworking future MTL PXP series end up getting impacted here). ...alan
On Thu, 17 Nov 2022, "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com> wrote: > Respectfully and humbly, i would like to request where is the coding > guideline for function naming when u have 2nd level subsystem IPs > owning control over global hw features so that we dont need to have > this back and forth of conflicting direction from different reviewers > especially so long after initial reviews have started. (internally > reworking future MTL PXP series end up getting impacted here). Do you seriously think we could pre-emptively codify everything in a coding guideline? BR, Jani.
Not everything of course, but intel_feature_action(param1, ...) enforcing param1 to always be struct intel_feature_t i assumed was what Rodrigo meant. And my intention wasn't to verify that rule but rather look for surrounding precedence for any exceptions to it (i felt PXP was a candidate for an exception since its services and consumers are global but its control-points are within the media tile alone). Either way, this exception won't be required give the new design direction from Rodrigo based on that last reply to patch #1. We will elevate pxp to be a global subsystem (despite the controls being gt specific). ...alan On Tue, 2022-11-22 at 13:17 +0200, Jani Nikula wrote: > On Thu, 17 Nov 2022, "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com> wrote: > > Respectfully and humbly, i would like to request where is the coding > > guideline for function naming when u have 2nd level subsystem IPs > > owning control over global hw features so that we dont need to have > > this back and forth of conflicting direction from different reviewers > > especially so long after initial reviews have started. (internally > > reworking future MTL PXP series end up getting impacted here). > > Do you seriously think we could pre-emptively codify everything in a > coding guideline? > > BR, > Jani. > > -- > Jani Nikula, Intel Open Source Graphics Center
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index 7f2831efc798..c123f4847b19 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -257,7 +257,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915, if (!protected) { pc->uses_protected_content = false; - } else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) { + } else if (!intel_pxp_is_enabled(i915)) { ret = -ENODEV; } else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) || !(pc->user_flags & BIT(UCONTEXT_BANNABLE))) { diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c index 33673fe7ee0a..e44803f9bec4 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c @@ -384,7 +384,7 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data if (ext.flags) return -EINVAL; - if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp)) + if (!intel_pxp_is_enabled(ext_data->i915)) return -ENODEV; ext_data->flags |= I915_BO_PROTECTED; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index d993e752bd36..88105101af79 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -9,6 +9,7 @@ #include "intel_pxp_tee.h" #include "gem/i915_gem_context.h" #include "gt/intel_context.h" +#include "gt/intel_gt.h" #include "i915_drv.h" /** @@ -58,11 +59,34 @@ bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp) INTEL_INFO((pxp_to_gt(pxp))->i915)->has_pxp && VDBOX_MASK(pxp_to_gt(pxp))); } -bool intel_pxp_is_enabled(const struct intel_pxp *pxp) +bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp) { return pxp->ce; } +static struct intel_gt *i915_to_pxp_gt(struct drm_i915_private *i915) +{ + struct intel_gt *gt = NULL; + int i = 0; + + for_each_gt(gt, i915, i) { + /* There can be only one GT that supports PXP */ + if (intel_pxp_supported_on_gt(>->pxp)) + return gt; + } + return NULL; +} + +bool intel_pxp_is_enabled(struct drm_i915_private *i915) +{ + struct intel_gt *gt = i915_to_pxp_gt(i915); + + if (!gt) + return false; + + return intel_pxp_is_enabled_on_gt(>->pxp); +} + bool intel_pxp_is_active(const struct intel_pxp *pxp) { return pxp->arb_is_valid; @@ -216,7 +240,7 @@ int intel_pxp_start(struct intel_pxp *pxp) { int ret = 0; - if (!intel_pxp_is_enabled(pxp)) + if (!intel_pxp_is_enabled_on_gt(pxp)) return -ENODEV; if (wait_for(pxp_component_bound(pxp), 250)) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index efa83f9d5e24..3f71b1653f74 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -11,12 +11,14 @@ struct intel_pxp; struct drm_i915_gem_object; +struct drm_i915_private; struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp); bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp); -bool intel_pxp_is_enabled(const struct intel_pxp *pxp); +bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp); +bool intel_pxp_is_enabled(struct drm_i915_private *i915); bool intel_pxp_is_active(const struct intel_pxp *pxp); void intel_pxp_init(struct intel_pxp *pxp); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c index f41e45763d0d..f322a49ebadc 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c @@ -99,7 +99,7 @@ int intel_pxp_terminate_session(struct intel_pxp *pxp, u32 id) u32 *cs; int err = 0; - if (!intel_pxp_is_enabled(pxp)) + if (!intel_pxp_is_enabled_on_gt(pxp)) return 0; rq = i915_request_create(ce); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c index f0ad6f34624a..4d257055434b 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c @@ -18,7 +18,7 @@ static int pxp_info_show(struct seq_file *m, void *data) { struct intel_pxp *pxp = m->private; struct drm_printer p = drm_seq_file_printer(m); - bool enabled = intel_pxp_is_enabled(pxp); + bool enabled = intel_pxp_is_enabled_on_gt(pxp); if (!enabled) { drm_printf(&p, "pxp disabled\n"); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c index c28be430718a..d3c697bf9aab 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c @@ -22,7 +22,7 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir) { struct intel_gt *gt = pxp_to_gt(pxp); - if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp))) + if (GEM_WARN_ON(!intel_pxp_is_enabled_on_gt(pxp))) return; lockdep_assert_held(gt->irq_lock); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c index 6a7d4e2ee138..19ac8828cbde 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c @@ -11,7 +11,7 @@ void intel_pxp_suspend_prepare(struct intel_pxp *pxp) { - if (!intel_pxp_is_enabled(pxp)) + if (!intel_pxp_is_enabled_on_gt(pxp)) return; pxp->arb_is_valid = false; @@ -23,7 +23,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp) { intel_wakeref_t wakeref; - if (!intel_pxp_is_enabled(pxp)) + if (!intel_pxp_is_enabled_on_gt(pxp)) return; with_intel_runtime_pm(&pxp_to_gt(pxp)->i915->runtime_pm, wakeref) { @@ -34,7 +34,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp) void intel_pxp_resume(struct intel_pxp *pxp) { - if (!intel_pxp_is_enabled(pxp)) + if (!intel_pxp_is_enabled_on_gt(pxp)) return; /* @@ -50,7 +50,7 @@ void intel_pxp_resume(struct intel_pxp *pxp) void intel_pxp_runtime_suspend(struct intel_pxp *pxp) { - if (!intel_pxp_is_enabled(pxp)) + if (!intel_pxp_is_enabled_on_gt(pxp)) return; pxp->arb_is_valid = false; diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c index b0c9170b1395..a5c9c692c20d 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c @@ -152,7 +152,7 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev, return 0; /* the component is required to fully start the PXP HW */ - if (intel_pxp_is_enabled(pxp)) + if (intel_pxp_is_enabled_on_gt(pxp)) intel_pxp_init_hw(pxp); intel_runtime_pm_put(&i915->runtime_pm, wakeref); @@ -167,7 +167,7 @@ static void i915_pxp_tee_component_unbind(struct device *i915_kdev, struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev); intel_wakeref_t wakeref; - if (intel_pxp_is_enabled(pxp)) + if (intel_pxp_is_enabled_on_gt(pxp)) with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref) intel_pxp_fini_hw(pxp);
Make intel_pxp_is_enabled a global check and implicitly find the PXP-owning-GT. PXP feature support is a device-config flag. In preparation for MTL PXP control-context shall reside on of the two GT's. That said, update intel_pxp_is_enabled to take in i915 as its input and internally find the right gt to check if PXP is enabled so its transparent to callers of this functions. However we also need to expose the per-gt variation of this internal pxp files to use (like what intel_pxp_enabled was prior) so also expose a new intel_gtpxp_is_enabled function for replacement. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +- drivers/gpu/drm/i915/pxp/intel_pxp.c | 28 ++++++++++++++++++-- drivers/gpu/drm/i915/pxp/intel_pxp.h | 4 ++- drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 2 +- drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 2 +- drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 2 +- drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 8 +++--- drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 4 +-- 9 files changed, 40 insertions(+), 14 deletions(-)