| Message ID | 20221117003018.1433115-4-alan.previn.teres.alexis@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/pxp: Prepare intel_pxp entry points for MTL | expand |
On Wed, Nov 16, 2022 at 04:30:15PM -0800, Alan Previn wrote: > Make intel_pxp_is_active a global check and implicitly find > the PXP-owning-GT. > > As per prior two patches, callers of this function shall now > pass in i915 since PXP is a global GPU feature. Make > intel_pxp_is_active implicitly find the right gt so it's transparent > for global view callers (like display or gem-exec). > > However we also need to expose the per-gt variation of this for internal > pxp files to use (like what intel_pxp_is_active was prior) so also expose > a new intel_gtpxp_is_active function for replacement. > > Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- > drivers/gpu/drm/i915/pxp/intel_pxp.c | 14 ++++++++++++-- > drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 ++- > drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 4 ++-- > drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 2 +- > 5 files changed, 18 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c > index c123f4847b19..165be45a3c13 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > @@ -271,7 +271,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915, > */ > pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm); > > - if (!intel_pxp_is_active(&to_gt(i915)->pxp)) > + if (!intel_pxp_is_active(i915)) > ret = intel_pxp_start(&to_gt(i915)->pxp); > } > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c > index 88105101af79..76a924587543 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c > @@ -87,11 +87,21 @@ bool intel_pxp_is_enabled(struct drm_i915_private *i915) > return intel_pxp_is_enabled_on_gt(>->pxp); > } > > -bool intel_pxp_is_active(const struct intel_pxp *pxp) > +bool intel_pxp_is_active_on_gt(const struct intel_pxp *pxp) if we are asking about the gt we should pass gt > { > return pxp->arb_is_valid; > } > > +bool intel_pxp_is_active(struct drm_i915_private *i915) > +{ > + struct intel_gt *gt = i915_to_pxp_gt(i915); > + > + if (!gt) > + return false; > + > + return intel_pxp_is_active_on_gt(>->pxp); > +} > + > /* KCR register definitions */ > #define KCR_INIT _MMIO(0x320f0) > /* Setting KCR Init bit is required after system boot */ > @@ -287,7 +297,7 @@ int intel_pxp_key_check(struct intel_pxp *pxp, > struct drm_i915_gem_object *obj, > bool assign) > { > - if (!intel_pxp_is_active(pxp)) > + if (!intel_pxp_is_active_on_gt(pxp)) > return -ENODEV; > > if (!i915_gem_object_is_protected(obj)) > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h > index 3f71b1653f74..fe981eebf0ec 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h > @@ -19,7 +19,8 @@ bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp); > > bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp); > bool intel_pxp_is_enabled(struct drm_i915_private *i915); > -bool intel_pxp_is_active(const struct intel_pxp *pxp); > +bool intel_pxp_is_active_on_gt(const struct intel_pxp *pxp); > +bool intel_pxp_is_active(struct drm_i915_private *i915); > > void intel_pxp_init(struct intel_pxp *pxp); > void intel_pxp_fini(struct intel_pxp *pxp); > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > index 4d257055434b..52a808fd4704 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c > @@ -25,7 +25,7 @@ static int pxp_info_show(struct seq_file *m, void *data) > return 0; > } > > - drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active(pxp))); > + drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active_on_gt(pxp))); > drm_printf(&p, "instance counter: %u\n", pxp->key_instance); > > return 0; > @@ -43,7 +43,7 @@ static int pxp_terminate_set(void *data, u64 val) > struct intel_pxp *pxp = data; > struct intel_gt *gt = pxp_to_gt(pxp); > > - if (!intel_pxp_is_active(pxp)) > + if (!intel_pxp_is_active_on_gt(pxp)) > return -ENODEV; > > /* simulate a termination interrupt */ > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > index d3c697bf9aab..c25c1979cccc 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c > @@ -86,7 +86,7 @@ void intel_pxp_irq_disable(struct intel_pxp *pxp) > * called in a path were the driver consider the session as valid and > * doesn't call a termination on restart. > */ > - GEM_WARN_ON(intel_pxp_is_active(pxp)); > + GEM_WARN_ON(intel_pxp_is_active_on_gt(pxp)); > > spin_lock_irq(gt->irq_lock); > > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index c123f4847b19..165be45a3c13 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -271,7 +271,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915, */ pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm); - if (!intel_pxp_is_active(&to_gt(i915)->pxp)) + if (!intel_pxp_is_active(i915)) ret = intel_pxp_start(&to_gt(i915)->pxp); } diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c index 88105101af79..76a924587543 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c @@ -87,11 +87,21 @@ bool intel_pxp_is_enabled(struct drm_i915_private *i915) return intel_pxp_is_enabled_on_gt(>->pxp); } -bool intel_pxp_is_active(const struct intel_pxp *pxp) +bool intel_pxp_is_active_on_gt(const struct intel_pxp *pxp) { return pxp->arb_is_valid; } +bool intel_pxp_is_active(struct drm_i915_private *i915) +{ + struct intel_gt *gt = i915_to_pxp_gt(i915); + + if (!gt) + return false; + + return intel_pxp_is_active_on_gt(>->pxp); +} + /* KCR register definitions */ #define KCR_INIT _MMIO(0x320f0) /* Setting KCR Init bit is required after system boot */ @@ -287,7 +297,7 @@ int intel_pxp_key_check(struct intel_pxp *pxp, struct drm_i915_gem_object *obj, bool assign) { - if (!intel_pxp_is_active(pxp)) + if (!intel_pxp_is_active_on_gt(pxp)) return -ENODEV; if (!i915_gem_object_is_protected(obj)) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h index 3f71b1653f74..fe981eebf0ec 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h @@ -19,7 +19,8 @@ bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp); bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp); bool intel_pxp_is_enabled(struct drm_i915_private *i915); -bool intel_pxp_is_active(const struct intel_pxp *pxp); +bool intel_pxp_is_active_on_gt(const struct intel_pxp *pxp); +bool intel_pxp_is_active(struct drm_i915_private *i915); void intel_pxp_init(struct intel_pxp *pxp); void intel_pxp_fini(struct intel_pxp *pxp); diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c index 4d257055434b..52a808fd4704 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c @@ -25,7 +25,7 @@ static int pxp_info_show(struct seq_file *m, void *data) return 0; } - drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active(pxp))); + drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active_on_gt(pxp))); drm_printf(&p, "instance counter: %u\n", pxp->key_instance); return 0; @@ -43,7 +43,7 @@ static int pxp_terminate_set(void *data, u64 val) struct intel_pxp *pxp = data; struct intel_gt *gt = pxp_to_gt(pxp); - if (!intel_pxp_is_active(pxp)) + if (!intel_pxp_is_active_on_gt(pxp)) return -ENODEV; /* simulate a termination interrupt */ diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c index d3c697bf9aab..c25c1979cccc 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c @@ -86,7 +86,7 @@ void intel_pxp_irq_disable(struct intel_pxp *pxp) * called in a path were the driver consider the session as valid and * doesn't call a termination on restart. */ - GEM_WARN_ON(intel_pxp_is_active(pxp)); + GEM_WARN_ON(intel_pxp_is_active_on_gt(pxp)); spin_lock_irq(gt->irq_lock);
Make intel_pxp_is_active a global check and implicitly find the PXP-owning-GT. As per prior two patches, callers of this function shall now pass in i915 since PXP is a global GPU feature. Make intel_pxp_is_active implicitly find the right gt so it's transparent for global view callers (like display or gem-exec). However we also need to expose the per-gt variation of this for internal pxp files to use (like what intel_pxp_is_active was prior) so also expose a new intel_gtpxp_is_active function for replacement. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- drivers/gpu/drm/i915/pxp/intel_pxp.c | 14 ++++++++++++-- drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 ++- drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 4 ++-- drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 2 +- 5 files changed, 18 insertions(+), 7 deletions(-)