Message ID | 20221123152638.20622-11-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: Gamma/DSB prep work | expand |
LGTM. Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> On 11/23/2022 8:56 PM, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The DSB has problem loading the LUTs at the moment. Some > of that is due to the palette anti collision logic, some > due to what seem real hw issues. Disable it the whole > thing locally in the color management code for now. > > Note that we currently have this weird situation where on > adl+ we load parts of the LUT with DSB and parts with mmio. > That is due to the fact that only some parts of the LUT code > are using the DSB register write functions (ivb_load_lut_ext*()), > while the rest is using pure mmio (bdw_load_lut_10()). So now > we'll go back to pure mmio temporarily, until the DSB issues > get fixed (at which point we should be going for pure DSB). > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_color.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c > index 2715f1b617e1..9978d21f1634 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -1394,6 +1394,9 @@ void intel_color_prepare_commit(struct intel_crtc_state *crtc_state) > { > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > + /* FIXME DSB has issues loading LUTs, disable it for now */ > + return; > + > crtc_state->dsb = intel_dsb_prepare(crtc); > } >
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala > Sent: Wednesday, November 23, 2022 8:57 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH 10/13] drm/i915: Disable DSB usage specifically for LUTs > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The DSB has problem loading the LUTs at the moment. Some of that is due to the > palette anti collision logic, some due to what seem real hw issues. Disable it the > whole thing locally in the color management code for now. > > Note that we currently have this weird situation where on > adl+ we load parts of the LUT with DSB and parts with mmio. > That is due to the fact that only some parts of the LUT code are using the DSB > register write functions (ivb_load_lut_ext*()), while the rest is using pure mmio > (bdw_load_lut_10()). So now we'll go back to pure mmio temporarily, until the DSB > issues get fixed (at which point we should be going for pure DSB). Yeah, we need to debug and analyze the failure with DSB. If needed, we can raise a hardware sighting. For now, let's keep it disabled: Reviewed-by: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_color.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c > b/drivers/gpu/drm/i915/display/intel_color.c > index 2715f1b617e1..9978d21f1634 100644 > --- a/drivers/gpu/drm/i915/display/intel_color.c > +++ b/drivers/gpu/drm/i915/display/intel_color.c > @@ -1394,6 +1394,9 @@ void intel_color_prepare_commit(struct intel_crtc_state > *crtc_state) { > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > > + /* FIXME DSB has issues loading LUTs, disable it for now */ > + return; > + > crtc_state->dsb = intel_dsb_prepare(crtc); } > > -- > 2.37.4
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 2715f1b617e1..9978d21f1634 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -1394,6 +1394,9 @@ void intel_color_prepare_commit(struct intel_crtc_state *crtc_state) { struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + /* FIXME DSB has issues loading LUTs, disable it for now */ + return; + crtc_state->dsb = intel_dsb_prepare(crtc); }