@@ -1848,7 +1848,7 @@ static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj)
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
- return intel_pxp_key_check(&to_gt(i915)->pxp, obj, false) == 0;
+ return intel_pxp_key_check(i915, obj, false) == 0;
}
static bool pxp_is_borked(struct drm_i915_gem_object *obj)
@@ -257,7 +257,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
if (!protected) {
pc->uses_protected_content = false;
- } else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) {
+ } else if (!intel_pxp_is_enabled(i915)) {
ret = -ENODEV;
} else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) ||
!(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {
@@ -271,8 +271,8 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
*/
pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- if (!intel_pxp_is_active(&to_gt(i915)->pxp))
- ret = intel_pxp_start(&to_gt(i915)->pxp);
+ if (!intel_pxp_is_active(i915))
+ ret = intel_pxp_start(i915);
}
return ret;
@@ -384,7 +384,7 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data
if (ext.flags)
return -EINVAL;
- if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp))
+ if (!intel_pxp_is_enabled(ext_data->i915))
return -ENODEV;
ext_data->flags |= I915_BO_PROTECTED;
@@ -869,7 +869,7 @@ static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle)
*/
if (i915_gem_context_uses_protected_content(eb->gem_context) &&
i915_gem_object_is_protected(obj)) {
- err = intel_pxp_key_check(&vm->gt->pxp, obj, true);
+ err = intel_pxp_key_check(vm->gt->i915, obj, true);
if (err) {
i915_gem_object_put(obj);
return ERR_PTR(err);
@@ -918,10 +918,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_GLOBAL_MOCS_REGISTERS(dev_priv) (INTEL_INFO(dev_priv)->has_global_mocs)
-#define HAS_PXP(dev_priv) ((IS_ENABLED(CONFIG_DRM_I915_PXP) && \
- INTEL_INFO(dev_priv)->has_pxp) && \
- VDBOX_MASK(to_gt(dev_priv)))
-
#define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
#define HAS_GMD_ID(i915) (INTEL_INFO(i915)->has_gmd_id)
@@ -9,6 +9,7 @@
#include "intel_pxp_tee.h"
#include "gem/i915_gem_context.h"
#include "gt/intel_context.h"
+#include "gt/intel_gt.h"
#include "i915_drv.h"
/**
@@ -44,16 +45,63 @@ struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp)
return container_of(pxp, struct intel_gt, pxp);
}
-bool intel_pxp_is_enabled(const struct intel_pxp *pxp)
+static bool _gt_needs_teelink(struct intel_gt *gt)
+{
+ /* TODO: MTL won't rely on CONFIG_INTEL_MEI_PXP but on GSC engine */
+ return (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && intel_huc_is_loaded_by_gsc(>->uc.huc) &&
+ intel_uc_uses_huc(>->uc));
+}
+
+bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp)
+{
+ /* TODO: MTL won't rely on CONFIG_INTEL_MEI_PXP but on GSC engine */
+ return (IS_ENABLED(CONFIG_INTEL_MEI_PXP) && IS_ENABLED(CONFIG_DRM_I915_PXP) &&
+ INTEL_INFO((pxp_to_gt(pxp))->i915)->has_pxp && VDBOX_MASK(pxp_to_gt(pxp)));
+}
+
+bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp)
{
return pxp->ce;
}
-bool intel_pxp_is_active(const struct intel_pxp *pxp)
+struct intel_gt *intel_pxp_get_owning_gt(struct drm_i915_private *i915)
+{
+ struct intel_gt *gt = NULL;
+ int i = 0;
+
+ for_each_gt(gt, i915, i) {
+ /* There can be only one GT that supports PXP */
+ if (intel_pxp_supported_on_gt(>->pxp))
+ return gt;
+ }
+ return NULL;
+}
+
+bool intel_pxp_is_enabled(struct drm_i915_private *i915)
+{
+ struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
+
+ if (!gt)
+ return false;
+
+ return intel_pxp_is_enabled_on_gt(>->pxp);
+}
+
+bool intel_pxp_is_active_on_gt(const struct intel_pxp *pxp)
{
return pxp->arb_is_valid;
}
+bool intel_pxp_is_active(struct drm_i915_private *i915)
+{
+ struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
+
+ if (!gt)
+ return false;
+
+ return intel_pxp_is_active_on_gt(>->pxp);
+}
+
/* KCR register definitions */
#define KCR_INIT _MMIO(0x320f0)
/* Setting KCR Init bit is required after system boot */
@@ -142,17 +190,13 @@ void intel_pxp_init(struct intel_pxp *pxp)
{
struct intel_gt *gt = pxp_to_gt(pxp);
- /* we rely on the mei PXP module */
- if (!IS_ENABLED(CONFIG_INTEL_MEI_PXP))
- return;
-
/*
* If HuC is loaded by GSC but PXP is disabled, we can skip the init of
* the full PXP session/object management and just init the tee channel.
*/
- if (HAS_PXP(gt->i915))
+ if (intel_pxp_supported_on_gt(pxp))
pxp_init_full(pxp);
- else if (intel_huc_is_loaded_by_gsc(>->uc.huc) && intel_uc_uses_huc(>->uc))
+ else if (_gt_needs_teelink(gt))
intel_pxp_tee_component_init(pxp);
}
@@ -202,11 +246,18 @@ static bool pxp_component_bound(struct intel_pxp *pxp)
* the arb session is restarted from the irq work when we receive the
* termination completion interrupt
*/
-int intel_pxp_start(struct intel_pxp *pxp)
+int intel_pxp_start(struct drm_i915_private *i915)
{
+ struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
+ struct intel_pxp *pxp;
int ret = 0;
- if (!intel_pxp_is_enabled(pxp))
+ if (!gt)
+ return -ENODEV;
+
+ pxp = >->pxp;
+
+ if (!intel_pxp_is_enabled_on_gt(pxp))
return -ENODEV;
if (wait_for(pxp_component_bound(pxp), 250))
@@ -249,11 +300,19 @@ void intel_pxp_fini_hw(struct intel_pxp *pxp)
intel_pxp_irq_disable(pxp);
}
-int intel_pxp_key_check(struct intel_pxp *pxp,
+int intel_pxp_key_check(struct drm_i915_private *i915,
struct drm_i915_gem_object *obj,
bool assign)
{
- if (!intel_pxp_is_active(pxp))
+ struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
+ struct intel_pxp *pxp;
+
+ if (!gt)
+ return -ENODEV;
+
+ pxp = >->pxp;
+
+ if (!intel_pxp_is_active_on_gt(pxp))
return -ENODEV;
if (!i915_gem_object_is_protected(obj))
@@ -11,10 +11,18 @@
struct intel_pxp;
struct drm_i915_gem_object;
+struct drm_i915_private;
+
+struct intel_gt *intel_pxp_get_owning_gt(struct drm_i915_private *i915);
struct intel_gt *pxp_to_gt(const struct intel_pxp *pxp);
-bool intel_pxp_is_enabled(const struct intel_pxp *pxp);
-bool intel_pxp_is_active(const struct intel_pxp *pxp);
+
+bool intel_pxp_supported_on_gt(const struct intel_pxp *pxp);
+
+bool intel_pxp_is_enabled_on_gt(const struct intel_pxp *pxp);
+bool intel_pxp_is_enabled(struct drm_i915_private *i915);
+bool intel_pxp_is_active_on_gt(const struct intel_pxp *pxp);
+bool intel_pxp_is_active(struct drm_i915_private *i915);
void intel_pxp_init(struct intel_pxp *pxp);
void intel_pxp_fini(struct intel_pxp *pxp);
@@ -24,9 +32,9 @@ void intel_pxp_fini_hw(struct intel_pxp *pxp);
void intel_pxp_mark_termination_in_progress(struct intel_pxp *pxp);
-int intel_pxp_start(struct intel_pxp *pxp);
+int intel_pxp_start(struct drm_i915_private *i915);
-int intel_pxp_key_check(struct intel_pxp *pxp,
+int intel_pxp_key_check(struct drm_i915_private *i915,
struct drm_i915_gem_object *obj,
bool assign);
@@ -99,7 +99,7 @@ int intel_pxp_terminate_session(struct intel_pxp *pxp, u32 id)
u32 *cs;
int err = 0;
- if (!intel_pxp_is_enabled(pxp))
+ if (!intel_pxp_is_enabled_on_gt(pxp))
return 0;
rq = i915_request_create(ce);
@@ -18,14 +18,14 @@ static int pxp_info_show(struct seq_file *m, void *data)
{
struct intel_pxp *pxp = m->private;
struct drm_printer p = drm_seq_file_printer(m);
- bool enabled = intel_pxp_is_enabled(pxp);
+ bool enabled = intel_pxp_is_enabled_on_gt(pxp);
if (!enabled) {
drm_printf(&p, "pxp disabled\n");
return 0;
}
- drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active(pxp)));
+ drm_printf(&p, "active: %s\n", str_yes_no(intel_pxp_is_active_on_gt(pxp)));
drm_printf(&p, "instance counter: %u\n", pxp->key_instance);
return 0;
@@ -43,7 +43,7 @@ static int pxp_terminate_set(void *data, u64 val)
struct intel_pxp *pxp = data;
struct intel_gt *gt = pxp_to_gt(pxp);
- if (!intel_pxp_is_active(pxp))
+ if (!intel_pxp_is_active_on_gt(pxp))
return -ENODEV;
/* simulate a termination interrupt */
@@ -70,7 +70,7 @@ void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
if (!gt_root)
return;
- if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
+ if (!intel_pxp_supported_on_gt(pxp))
return;
root = debugfs_create_dir("pxp", gt_root);
@@ -22,7 +22,7 @@ void intel_pxp_irq_handler(struct intel_pxp *pxp, u16 iir)
{
struct intel_gt *gt = pxp_to_gt(pxp);
- if (GEM_WARN_ON(!intel_pxp_is_enabled(pxp)))
+ if (GEM_WARN_ON(!intel_pxp_is_enabled_on_gt(pxp)))
return;
lockdep_assert_held(gt->irq_lock);
@@ -86,7 +86,7 @@ void intel_pxp_irq_disable(struct intel_pxp *pxp)
* called in a path were the driver consider the session as valid and
* doesn't call a termination on restart.
*/
- GEM_WARN_ON(intel_pxp_is_active(pxp));
+ GEM_WARN_ON(intel_pxp_is_active_on_gt(pxp));
spin_lock_irq(gt->irq_lock);
@@ -11,7 +11,7 @@
void intel_pxp_suspend_prepare(struct intel_pxp *pxp)
{
- if (!intel_pxp_is_enabled(pxp))
+ if (!intel_pxp_is_enabled_on_gt(pxp))
return;
pxp->arb_is_valid = false;
@@ -23,7 +23,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp)
{
intel_wakeref_t wakeref;
- if (!intel_pxp_is_enabled(pxp))
+ if (!intel_pxp_is_enabled_on_gt(pxp))
return;
with_intel_runtime_pm(&pxp_to_gt(pxp)->i915->runtime_pm, wakeref) {
@@ -34,7 +34,7 @@ void intel_pxp_suspend(struct intel_pxp *pxp)
void intel_pxp_resume(struct intel_pxp *pxp)
{
- if (!intel_pxp_is_enabled(pxp))
+ if (!intel_pxp_is_enabled_on_gt(pxp))
return;
/*
@@ -50,7 +50,7 @@ void intel_pxp_resume(struct intel_pxp *pxp)
void intel_pxp_runtime_suspend(struct intel_pxp *pxp)
{
- if (!intel_pxp_is_enabled(pxp))
+ if (!intel_pxp_is_enabled_on_gt(pxp))
return;
pxp->arb_is_valid = false;
@@ -20,8 +20,12 @@
static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
{
struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
+ struct intel_gt *gt = intel_pxp_get_owning_gt(i915);
- return &to_gt(i915)->pxp;
+ if (!gt)
+ return NULL;
+
+ return >->pxp;
}
static int intel_pxp_tee_io_message(struct intel_pxp *pxp,
@@ -128,10 +132,16 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev,
{
struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
- struct intel_uc *uc = &pxp_to_gt(pxp)->uc;
+ struct intel_uc *uc;
intel_wakeref_t wakeref;
int ret = 0;
+ if (!pxp) {
+ drm_warn(&i915->drm, "tee comp binding without a PXP-owner GT\n");
+ return -ENODEV;
+ }
+ uc = &pxp_to_gt(pxp)->uc;
+
mutex_lock(&pxp->tee_mutex);
pxp->pxp_component = data;
pxp->pxp_component->tee_dev = tee_kdev;
@@ -152,7 +162,7 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev,
return 0;
/* the component is required to fully start the PXP HW */
- if (intel_pxp_is_enabled(pxp))
+ if (intel_pxp_is_enabled_on_gt(pxp))
intel_pxp_init_hw(pxp);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
@@ -167,7 +177,7 @@ static void i915_pxp_tee_component_unbind(struct device *i915_kdev,
struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
intel_wakeref_t wakeref;
- if (intel_pxp_is_enabled(pxp))
+ if (intel_pxp_is_enabled_on_gt(pxp))
with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref)
intel_pxp_fini_hw(pxp);
Squash of all the patches from the series: https://patchwork.freedesktop.org/series/109429/ Above series is not a prerequisite to showcase the design changes being proposed in the next set of patches but will be in the same order dependency as here. NOTE: that series will be going through a major redesign based on the latest review comments. Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com> --- .../drm/i915/display/skl_universal_plane.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +- drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 4 - drivers/gpu/drm/i915/pxp/intel_pxp.c | 83 ++++++++++++++++--- drivers/gpu/drm/i915/pxp/intel_pxp.h | 16 +++- drivers/gpu/drm/i915/pxp/intel_pxp_cmd.c | 2 +- drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 8 +- drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 4 +- drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 8 +- drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 18 +++- 12 files changed, 114 insertions(+), 41 deletions(-)