diff mbox series

[v2,2/4] drm/i915/mtl: Add Wa_14015846243 to fix OA vs CS timestamp mismatch

Message ID 20221201010535.1097741-3-umesh.nerlige.ramappa@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/mtl: Add OAG 32 bit format support for MTL | expand

Commit Message

Umesh Nerlige Ramappa Dec. 1, 2022, 1:05 a.m. UTC
Similar to ACM, OA timestamp that is part of the OA report is shifted
when compared to the CS timestamp. Add MTL to the WA.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/i915/i915_perf.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Comments

Dixit, Ashutosh Dec. 1, 2022, 2:16 a.m. UTC | #1
On Wed, 30 Nov 2022 17:05:33 -0800, Umesh Nerlige Ramappa wrote:
>
> Similar to ACM, OA timestamp that is part of the OA report is shifted
> when compared to the CS timestamp. Add MTL to the WA.

Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>

>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_perf.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 7790a88f10d8..8ed9af571de9 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -3136,8 +3136,11 @@ get_sseu_config(struct intel_sseu *out_sseu,
>   */
>  u32 i915_perf_oa_timestamp_frequency(struct drm_i915_private *i915)
>  {
> -	/* Wa_18013179988:dg2 */
> -	if (IS_DG2(i915)) {
> +	/*
> +	 * Wa_18013179988:dg2
> +	 * Wa_14015846243:mtl
> +	 */
> +	if (IS_DG2(i915) || IS_METEORLAKE(i915)) {
>		intel_wakeref_t wakeref;
>		u32 reg, shift;
>
> --
> 2.36.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 7790a88f10d8..8ed9af571de9 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -3136,8 +3136,11 @@  get_sseu_config(struct intel_sseu *out_sseu,
  */
 u32 i915_perf_oa_timestamp_frequency(struct drm_i915_private *i915)
 {
-	/* Wa_18013179988:dg2 */
-	if (IS_DG2(i915)) {
+	/*
+	 * Wa_18013179988:dg2
+	 * Wa_14015846243:mtl
+	 */
+	if (IS_DG2(i915) || IS_METEORLAKE(i915)) {
 		intel_wakeref_t wakeref;
 		u32 reg, shift;