| Message ID | 20221220081117.169803-2-luciano.coelho@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/mtl: handle some MTL scaler limitations | expand |
On Tue, Dec 20, 2022 at 10:11:16AM +0200, Luca Coelho wrote: > In newer hardware versions (i.e. display version >= 14), the second > scaler doesn't support vertical scaling. > > The current implementation of the scaling limits is simplified and > only occurs when the planes are created, so we don't know which scaler > is being used. > > In order to handle separate scaling limits for horizontal and vertical > scaling, and different limits per scaler, split the checks in two > phases. We first do a simple check during plane creation and use the > best-case scenario (because we don't know the scaler that may be used > at a later point) and then do a more specific check when the scalers > are actually being set up. > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com> > --- > > In v2: > * fix DRM_PLANE_NO_SCALING renamed macros; > > In v3: > * No changes. > > In v4: > * Got rid of the changes in the general planes max scale code; > * Added a couple of FIXMEs; > * Made intel_atomic_setup_scaler() return an int with errors; > > In v5: > * Just resent with a cover letter. > > drivers/gpu/drm/i915/display/i9xx_plane.c | 4 +- > drivers/gpu/drm/i915/display/intel_atomic.c | 83 ++++++++++++++++--- > .../gpu/drm/i915/display/intel_atomic_plane.c | 30 ++++++- > .../gpu/drm/i915/display/intel_atomic_plane.h | 2 +- > drivers/gpu/drm/i915/display/intel_cursor.c | 4 +- > drivers/gpu/drm/i915/display/intel_sprite.c | 20 +---- > .../drm/i915/display/skl_universal_plane.c | 45 +++++----- > 7 files changed, 128 insertions(+), 60 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c > index ecaeb7dc196b..390e96f0692b 100644 > --- a/drivers/gpu/drm/i915/display/i9xx_plane.c > +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c > @@ -326,9 +326,7 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state, > if (ret) > return ret; > > - ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, > - DRM_PLANE_NO_SCALING, > - DRM_PLANE_NO_SCALING, > + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, false, > i9xx_plane_has_windowing(plane)); > if (ret) > return ret; > diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c > index 6621aa245caf..bf4761a40675 100644 > --- a/drivers/gpu/drm/i915/display/intel_atomic.c > +++ b/drivers/gpu/drm/i915/display/intel_atomic.c > @@ -38,6 +38,7 @@ > #include "intel_atomic.h" > #include "intel_cdclk.h" > #include "intel_display_types.h" > +#include "intel_fb.h" > #include "intel_global_state.h" > #include "intel_hdcp.h" > #include "intel_psr.h" > @@ -310,11 +311,11 @@ intel_crtc_destroy_state(struct drm_crtc *crtc, > kfree(crtc_state); > } > > -static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state, > - int num_scalers_need, struct intel_crtc *intel_crtc, > - const char *name, int idx, > - struct intel_plane_state *plane_state, > - int *scaler_id) > +static int intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state, > + int num_scalers_need, struct intel_crtc *intel_crtc, > + const char *name, int idx, > + struct intel_plane_state *plane_state, > + int *scaler_id) > { > struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); > int j; > @@ -334,7 +335,7 @@ static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_sta > > if (drm_WARN(&dev_priv->drm, *scaler_id < 0, > "Cannot find scaler for %s:%d\n", name, idx)) > - return; > + return -EBUSY; > > /* set scaler mode */ > if (plane_state && plane_state->hw.fb && > @@ -375,9 +376,69 @@ static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_sta > mode = SKL_PS_SCALER_MODE_DYN; > } > > + /* > + * FIXME: we should also check the scaler factors for pfit, so > + * this shouldn't be tied directly to planes. > + */ > + if (plane_state && plane_state->hw.fb) { > + const struct drm_framebuffer *fb = plane_state->hw.fb; > + struct drm_rect *src = &plane_state->uapi.src; > + struct drm_rect *dst = &plane_state->uapi.dst; > + int hscale, vscale, max_vscale, max_hscale; > + > + /* > + * FIXME: When two scalers are needed, but only one of > + * them needs to downscale, we should make sure that > + * the one that needs downscaling support is assigned > + * as the first scaler, so we don't reject downscaling > + * unnecessarily. > + */ > + > + if (DISPLAY_VER(dev_priv) >= 14) { > + /* > + * On versions 14 and up, only the first > + * scaler supports a vertical scaling factor > + * of more than 1.0, while a horizontal > + * scaling factor of 3.0 is supported. > + */ > + max_hscale = 0x30000 - 1; > + if (*scaler_id == 0) > + max_vscale = 0x30000 - 1; > + else > + max_vscale = 0x10000; > + > + } else if (DISPLAY_VER(dev_priv) >= 10 || > + !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { > + max_hscale = 0x30000 - 1; > + max_vscale = 0x30000 - 1; > + } else { > + max_hscale = 0x20000 - 1; > + max_vscale = 0x20000 - 1; > + } > + > + /* Check if required scaling is within limits */ > + hscale = drm_rect_calc_hscale(src, dst, 1, max_hscale); > + vscale = drm_rect_calc_vscale(src, dst, 1, max_vscale); > + > + if (hscale < 0 || vscale < 0) { > + drm_dbg_kms(&dev_priv->drm, > + "Scaler %d doesn't support required plane scaling\n", > + *scaler_id); > + drm_rect_debug_print("src: ", src, true); > + drm_rect_debug_print("dst: ", dst, false); > + > + scaler_state->scalers[*scaler_id].in_use = 0; > + *scaler_id = -1; > + > + return -EOPNOTSUPP; > + } > + } > + > drm_dbg_kms(&dev_priv->drm, "Attached scaler id %u.%u to %s:%d\n", > intel_crtc->pipe, *scaler_id, name, idx); > scaler_state->scalers[*scaler_id].mode = mode; > + > + return 0; > } > > /** > @@ -437,7 +498,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, > for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) { > int *scaler_id; > const char *name; > - int idx; > + int idx, ret; > > /* skip if scaler not required */ > if (!(scaler_state->scaler_users & (1 << i))) > @@ -494,9 +555,11 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, > scaler_id = &plane_state->scaler_id; > } > > - intel_atomic_setup_scaler(scaler_state, num_scalers_need, > - intel_crtc, name, idx, > - plane_state, scaler_id); > + ret = intel_atomic_setup_scaler(scaler_state, num_scalers_need, > + intel_crtc, name, idx, > + plane_state, scaler_id); > + if (ret) > + return ret; > } > > return 0; > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > index 10e1fc9d0698..50a05ccd2dda 100644 > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > @@ -887,7 +887,7 @@ void intel_crtc_planes_update_arm(struct intel_atomic_state *state, > > int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state, > struct intel_crtc_state *crtc_state, > - int min_scale, int max_scale, > + bool allow_scaling, > bool can_position) > { > struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); > @@ -897,19 +897,41 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state, > const struct drm_rect *clip = &crtc_state->pipe_src; > unsigned int rotation = plane_state->hw.rotation; > int hscale, vscale; > + int max_hscale, min_hscale, max_vscale, min_vscale; > > if (!fb) { > plane_state->uapi.visible = false; > return 0; > } > > + /* > + * At this point we don't really know the HW limitations, so > + * we just sanitize the values against the maximum supported > + * scaling. > + */ > + if (!allow_scaling) { > + min_hscale = DRM_PLANE_NO_SCALING; > + max_hscale = DRM_PLANE_NO_SCALING; > + min_vscale = DRM_PLANE_NO_SCALING; > + max_vscale = DRM_PLANE_NO_SCALING; > + } else { > + skl_plane_max_scale(i915, fb, > + &max_hscale, &min_hscale, > + &max_vscale, &min_vscale); > + } This stuff is still broken for pre-skl. Please just drop all the changes to intel_atomic_plane_check_clipping(). > + > drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation); > > /* Check scaling */ > - hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale); > - vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale); > + hscale = drm_rect_calc_hscale(src, dst, min_hscale, max_hscale); > + vscale = drm_rect_calc_vscale(src, dst, min_vscale, max_vscale); > if (hscale < 0 || vscale < 0) { > - drm_dbg_kms(&i915->drm, "Invalid scaling of plane\n"); > + drm_dbg_kms(&i915->drm, > + "Invalid scaling of plane: hscale 0x%x vscale 0x%x\n", > + hscale, vscale); > + drm_dbg_kms(&i915->drm, > + "min_hscale 0x%0x max_hscale 0x%0x min_vscale 0x%0x max_vscale 0x%0x\n", > + min_hscale, max_hscale, min_vscale, max_vscale); > drm_rect_debug_print("src: ", src, true); > drm_rect_debug_print("dst: ", dst, false); > return -ERANGE; > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h > index 74b6d3b169a7..441ef8165212 100644 > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h > @@ -60,7 +60,7 @@ int intel_plane_calc_min_cdclk(struct intel_atomic_state *state, > bool *need_cdclk_calc); > int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state, > struct intel_crtc_state *crtc_state, > - int min_scale, int max_scale, > + bool check_scaling, > bool can_position); > void intel_plane_set_invisible(struct intel_crtc_state *crtc_state, > struct intel_plane_state *plane_state); > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c > index d190fa0d393b..741ec74f54f6 100644 > --- a/drivers/gpu/drm/i915/display/intel_cursor.c > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c > @@ -144,9 +144,7 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state, > } > > ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, > - DRM_PLANE_NO_SCALING, > - DRM_PLANE_NO_SCALING, > - true); > + false, true); > if (ret) > return ret; > > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c > index e6b4d24b9cd0..4aa247e190a5 100644 > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > @@ -1355,22 +1355,12 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state, > { > struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); > struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > - int min_scale = DRM_PLANE_NO_SCALING; > - int max_scale = DRM_PLANE_NO_SCALING; > int ret; > > - if (g4x_fb_scalable(plane_state->hw.fb)) { > - if (DISPLAY_VER(dev_priv) < 7) { > - min_scale = 1; > - max_scale = 16 << 16; > - } else if (IS_IVYBRIDGE(dev_priv)) { > - min_scale = 1; > - max_scale = 2 << 16; > - } > - } > - > ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, > - min_scale, max_scale, true); > + g4x_fb_scalable(plane_state->hw.fb) && > + DISPLAY_VER, > + true); > if (ret) > return ret; > > @@ -1426,9 +1416,7 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, > return ret; > > ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, > - DRM_PLANE_NO_SCALING, > - DRM_PLANE_NO_SCALING, > - true); > + false, true); > if (ret) > return ret; > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c > index 76490cc59d8f..c3e6e45a0d4b 100644 > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c > @@ -388,6 +388,25 @@ static int glk_plane_max_width(const struct drm_framebuffer *fb, > } > } > > +static void skl_plane_max_scale(struct drm_i915_private *i915, > + struct drm_framebuffer *fb, > + int *max_hscale, int *min_hscale, > + int *max_vscale, int *min_vscale) > +{ > + *min_vscale = 1; > + *min_hscale = 1; > + > + if (DISPLAY_VER(i915) < 10 || > + intel_format_info_is_yuv_semiplanar(fb->format, > + fb->modifier)) { > + *max_vscale = 0x20000 - 1; > + *max_hscale = 0x20000 - 1; > + } else { > + *max_vscale = 0x30000 - 1; > + *max_hscale = 0x30000 - 1; > + } > +} > + > static int icl_plane_min_width(const struct drm_framebuffer *fb, > int color_plane, > unsigned int rotation) > @@ -1463,22 +1482,6 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s > return 0; > } > > -static int skl_plane_max_scale(struct drm_i915_private *dev_priv, > - const struct drm_framebuffer *fb) > -{ > - /* > - * We don't yet know the final source width nor > - * whether we can use the HQ scaler mode. Assume > - * the best case. > - * FIXME need to properly check this later. > - */ > - if (DISPLAY_VER(dev_priv) >= 10 || > - !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) > - return 0x30000 - 1; > - else > - return 0x20000 - 1; > -} > - > static int intel_plane_min_width(struct intel_plane *plane, > const struct drm_framebuffer *fb, > int color_plane, > @@ -1862,8 +1865,7 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, > struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); > struct drm_i915_private *dev_priv = to_i915(plane->base.dev); > const struct drm_framebuffer *fb = plane_state->hw.fb; > - int min_scale = DRM_PLANE_NO_SCALING; > - int max_scale = DRM_PLANE_NO_SCALING; > + bool allow_scaling; > int ret; > > ret = skl_plane_check_fb(crtc_state, plane_state); > @@ -1871,13 +1873,10 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, > return ret; > > /* use scaler when colorkey is not required */ > - if (!plane_state->ckey.flags && skl_fb_scalable(fb)) { > - min_scale = 1; > - max_scale = skl_plane_max_scale(dev_priv, fb); > - } > + allow_scaling = !plane_state->ckey.flags && skl_fb_scalable(fb); > > ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, > - min_scale, max_scale, true); > + allow_scaling, true); > if (ret) > return ret; > > -- > 2.38.1
Hi Luca,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
url: https://github.com/intel-lab-lkp/linux/commits/Luca-Coelho/drm-i915-mtl-handle-some-MTL-scaler-limitations/20221220-162511
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link: https://lore.kernel.org/r/20221220081117.169803-2-luciano.coelho%40intel.com
patch subject: [Intel-gfx] [PATCH v5 1/2] drm/i915/mtl: limit second scaler vertical scaling in ver >= 14
config: x86_64-rhel-8.3-func
compiler: gcc-11 (Debian 11.3.0-8) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/d92c5ad60bf90c257eee5583ebc1bab12cde716d
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Luca-Coelho/drm-i915-mtl-handle-some-MTL-scaler-limitations/20221220-162511
git checkout d92c5ad60bf90c257eee5583ebc1bab12cde716d
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=x86_64 olddefconfig
make W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/i915/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/display/intel_atomic_plane.c: In function 'intel_atomic_plane_check_clipping':
>> drivers/gpu/drm/i915/display/intel_atomic_plane.c:918:17: error: implicit declaration of function 'skl_plane_max_scale' [-Werror=implicit-function-declaration]
918 | skl_plane_max_scale(i915, fb,
| ^~~~~~~~~~~~~~~~~~~
cc1: some warnings being treated as errors
--
drivers/gpu/drm/i915/display/intel_sprite.c: In function 'g4x_sprite_check':
>> drivers/gpu/drm/i915/display/intel_sprite.c:1362:49: error: 'DISPLAY_VER' undeclared (first use in this function)
1362 | DISPLAY_VER,
| ^~~~~~~~~~~
drivers/gpu/drm/i915/display/intel_sprite.c:1362:49: note: each undeclared identifier is reported only once for each function it appears in
vim +/skl_plane_max_scale +918 drivers/gpu/drm/i915/display/intel_atomic_plane.c
887
888 int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
889 struct intel_crtc_state *crtc_state,
890 bool allow_scaling,
891 bool can_position)
892 {
893 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
894 struct drm_framebuffer *fb = plane_state->hw.fb;
895 struct drm_rect *src = &plane_state->uapi.src;
896 struct drm_rect *dst = &plane_state->uapi.dst;
897 const struct drm_rect *clip = &crtc_state->pipe_src;
898 unsigned int rotation = plane_state->hw.rotation;
899 int hscale, vscale;
900 int max_hscale, min_hscale, max_vscale, min_vscale;
901
902 if (!fb) {
903 plane_state->uapi.visible = false;
904 return 0;
905 }
906
907 /*
908 * At this point we don't really know the HW limitations, so
909 * we just sanitize the values against the maximum supported
910 * scaling.
911 */
912 if (!allow_scaling) {
913 min_hscale = DRM_PLANE_NO_SCALING;
914 max_hscale = DRM_PLANE_NO_SCALING;
915 min_vscale = DRM_PLANE_NO_SCALING;
916 max_vscale = DRM_PLANE_NO_SCALING;
917 } else {
> 918 skl_plane_max_scale(i915, fb,
919 &max_hscale, &min_hscale,
920 &max_vscale, &min_vscale);
921 }
922
923 drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation);
924
925 /* Check scaling */
926 hscale = drm_rect_calc_hscale(src, dst, min_hscale, max_hscale);
927 vscale = drm_rect_calc_vscale(src, dst, min_vscale, max_vscale);
928 if (hscale < 0 || vscale < 0) {
929 drm_dbg_kms(&i915->drm,
930 "Invalid scaling of plane: hscale 0x%x vscale 0x%x\n",
931 hscale, vscale);
932 drm_dbg_kms(&i915->drm,
933 "min_hscale 0x%0x max_hscale 0x%0x min_vscale 0x%0x max_vscale 0x%0x\n",
934 min_hscale, max_hscale, min_vscale, max_vscale);
935 drm_rect_debug_print("src: ", src, true);
936 drm_rect_debug_print("dst: ", dst, false);
937 return -ERANGE;
938 }
939
940 /*
941 * FIXME: This might need further adjustment for seamless scaling
942 * with phase information, for the 2p2 and 2p1 scenarios.
943 */
944 plane_state->uapi.visible = drm_rect_clip_scaled(src, dst, clip);
945
946 drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation);
947
948 if (!can_position && plane_state->uapi.visible &&
949 !drm_rect_equals(dst, clip)) {
950 drm_dbg_kms(&i915->drm, "Plane must cover entire CRTC\n");
951 drm_rect_debug_print("dst: ", dst, false);
952 drm_rect_debug_print("clip: ", clip, false);
953 return -EINVAL;
954 }
955
956 /* final plane coordinates will be relative to the plane's pipe */
957 drm_rect_translate(dst, -clip->x1, -clip->y1);
958
959 return 0;
960 }
961
On Tue, 2022-12-20 at 13:09 +0200, Ville Syrjälä wrote: > On Tue, Dec 20, 2022 at 10:11:16AM +0200, Luca Coelho wrote: > > In newer hardware versions (i.e. display version >= 14), the second > > scaler doesn't support vertical scaling. > > > > The current implementation of the scaling limits is simplified and > > only occurs when the planes are created, so we don't know which scaler > > is being used. > > > > In order to handle separate scaling limits for horizontal and vertical > > scaling, and different limits per scaler, split the checks in two > > phases. We first do a simple check during plane creation and use the > > best-case scenario (because we don't know the scaler that may be used > > at a later point) and then do a more specific check when the scalers > > are actually being set up. > > > > Signed-off-by: Luca Coelho <luciano.coelho@intel.com> > > --- > > > > In v2: > > * fix DRM_PLANE_NO_SCALING renamed macros; > > > > In v3: > > * No changes. > > > > In v4: > > * Got rid of the changes in the general planes max scale code; > > * Added a couple of FIXMEs; > > * Made intel_atomic_setup_scaler() return an int with errors; > > > > In v5: > > * Just resent with a cover letter. > > > > drivers/gpu/drm/i915/display/i9xx_plane.c | 4 +- > > drivers/gpu/drm/i915/display/intel_atomic.c | 83 ++++++++++++++++--- > > .../gpu/drm/i915/display/intel_atomic_plane.c | 30 ++++++- > > .../gpu/drm/i915/display/intel_atomic_plane.h | 2 +- > > drivers/gpu/drm/i915/display/intel_cursor.c | 4 +- > > drivers/gpu/drm/i915/display/intel_sprite.c | 20 +---- > > .../drm/i915/display/skl_universal_plane.c | 45 +++++----- > > 7 files changed, 128 insertions(+), 60 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c > > index ecaeb7dc196b..390e96f0692b 100644 > > --- a/drivers/gpu/drm/i915/display/i9xx_plane.c > > +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c > > @@ -326,9 +326,7 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state, > > if (ret) > > return ret; > > > > - ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, > > - DRM_PLANE_NO_SCALING, > > - DRM_PLANE_NO_SCALING, > > + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, false, > > i9xx_plane_has_windowing(plane)); > > if (ret) > > return ret; > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c > > index 6621aa245caf..bf4761a40675 100644 > > --- a/drivers/gpu/drm/i915/display/intel_atomic.c > > +++ b/drivers/gpu/drm/i915/display/intel_atomic.c > > @@ -38,6 +38,7 @@ > > #include "intel_atomic.h" > > #include "intel_cdclk.h" > > #include "intel_display_types.h" > > +#include "intel_fb.h" > > #include "intel_global_state.h" > > #include "intel_hdcp.h" > > #include "intel_psr.h" > > @@ -310,11 +311,11 @@ intel_crtc_destroy_state(struct drm_crtc *crtc, > > kfree(crtc_state); > > } > > > > -static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state, > > - int num_scalers_need, struct intel_crtc *intel_crtc, > > - const char *name, int idx, > > - struct intel_plane_state *plane_state, > > - int *scaler_id) > > +static int intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state, > > + int num_scalers_need, struct intel_crtc *intel_crtc, > > + const char *name, int idx, > > + struct intel_plane_state *plane_state, > > + int *scaler_id) > > { > > struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); > > int j; > > @@ -334,7 +335,7 @@ static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_sta > > > > if (drm_WARN(&dev_priv->drm, *scaler_id < 0, > > "Cannot find scaler for %s:%d\n", name, idx)) > > - return; > > + return -EBUSY; > > > > /* set scaler mode */ > > if (plane_state && plane_state->hw.fb && > > @@ -375,9 +376,69 @@ static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_sta > > mode = SKL_PS_SCALER_MODE_DYN; > > } > > > > + /* > > + * FIXME: we should also check the scaler factors for pfit, so > > + * this shouldn't be tied directly to planes. > > + */ > > + if (plane_state && plane_state->hw.fb) { > > + const struct drm_framebuffer *fb = plane_state->hw.fb; > > + struct drm_rect *src = &plane_state->uapi.src; > > + struct drm_rect *dst = &plane_state->uapi.dst; > > + int hscale, vscale, max_vscale, max_hscale; > > + > > + /* > > + * FIXME: When two scalers are needed, but only one of > > + * them needs to downscale, we should make sure that > > + * the one that needs downscaling support is assigned > > + * as the first scaler, so we don't reject downscaling > > + * unnecessarily. > > + */ > > + > > + if (DISPLAY_VER(dev_priv) >= 14) { > > + /* > > + * On versions 14 and up, only the first > > + * scaler supports a vertical scaling factor > > + * of more than 1.0, while a horizontal > > + * scaling factor of 3.0 is supported. > > + */ > > + max_hscale = 0x30000 - 1; > > + if (*scaler_id == 0) > > + max_vscale = 0x30000 - 1; > > + else > > + max_vscale = 0x10000; > > + > > + } else if (DISPLAY_VER(dev_priv) >= 10 || > > + !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { > > + max_hscale = 0x30000 - 1; > > + max_vscale = 0x30000 - 1; > > + } else { > > + max_hscale = 0x20000 - 1; > > + max_vscale = 0x20000 - 1; > > + } > > + > > + /* Check if required scaling is within limits */ > > + hscale = drm_rect_calc_hscale(src, dst, 1, max_hscale); > > + vscale = drm_rect_calc_vscale(src, dst, 1, max_vscale); > > + > > + if (hscale < 0 || vscale < 0) { > > + drm_dbg_kms(&dev_priv->drm, > > + "Scaler %d doesn't support required plane scaling\n", > > + *scaler_id); > > + drm_rect_debug_print("src: ", src, true); > > + drm_rect_debug_print("dst: ", dst, false); > > + > > + scaler_state->scalers[*scaler_id].in_use = 0; > > + *scaler_id = -1; > > + > > + return -EOPNOTSUPP; > > + } > > + } > > + > > drm_dbg_kms(&dev_priv->drm, "Attached scaler id %u.%u to %s:%d\n", > > intel_crtc->pipe, *scaler_id, name, idx); > > scaler_state->scalers[*scaler_id].mode = mode; > > + > > + return 0; > > } > > > > /** > > @@ -437,7 +498,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, > > for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) { > > int *scaler_id; > > const char *name; > > - int idx; > > + int idx, ret; > > > > /* skip if scaler not required */ > > if (!(scaler_state->scaler_users & (1 << i))) > > @@ -494,9 +555,11 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, > > scaler_id = &plane_state->scaler_id; > > } > > > > - intel_atomic_setup_scaler(scaler_state, num_scalers_need, > > - intel_crtc, name, idx, > > - plane_state, scaler_id); > > + ret = intel_atomic_setup_scaler(scaler_state, num_scalers_need, > > + intel_crtc, name, idx, > > + plane_state, scaler_id); > > + if (ret) > > + return ret; > > } > > > > return 0; > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > > index 10e1fc9d0698..50a05ccd2dda 100644 > > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c > > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > > @@ -887,7 +887,7 @@ void intel_crtc_planes_update_arm(struct intel_atomic_state *state, > > > > int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state, > > struct intel_crtc_state *crtc_state, > > - int min_scale, int max_scale, > > + bool allow_scaling, > > bool can_position) > > { > > struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); > > @@ -897,19 +897,41 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state, > > const struct drm_rect *clip = &crtc_state->pipe_src; > > unsigned int rotation = plane_state->hw.rotation; > > int hscale, vscale; > > + int max_hscale, min_hscale, max_vscale, min_vscale; > > > > if (!fb) { > > plane_state->uapi.visible = false; > > return 0; > > } > > > > + /* > > + * At this point we don't really know the HW limitations, so > > + * we just sanitize the values against the maximum supported > > + * scaling. > > + */ > > + if (!allow_scaling) { > > + min_hscale = DRM_PLANE_NO_SCALING; > > + max_hscale = DRM_PLANE_NO_SCALING; > > + min_vscale = DRM_PLANE_NO_SCALING; > > + max_vscale = DRM_PLANE_NO_SCALING; > > + } else { > > + skl_plane_max_scale(i915, fb, > > + &max_hscale, &min_hscale, > > + &max_vscale, &min_vscale); > > + } > > This stuff is still broken for pre-skl. Please just drop all > the changes to intel_atomic_plane_check_clipping(). Damn, it seems that I sent the wrong version. This was removed in v4, but I took the wrong version here. I'll resend. -- Cheers, Luca.
Hi Luca,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
url: https://github.com/intel-lab-lkp/linux/commits/Luca-Coelho/drm-i915-mtl-handle-some-MTL-scaler-limitations/20221220-162511
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link: https://lore.kernel.org/r/20221220081117.169803-2-luciano.coelho%40intel.com
patch subject: [Intel-gfx] [PATCH v5 1/2] drm/i915/mtl: limit second scaler vertical scaling in ver >= 14
config: x86_64-rhel-8.3-rust
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/d92c5ad60bf90c257eee5583ebc1bab12cde716d
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Luca-Coelho/drm-i915-mtl-handle-some-MTL-scaler-limitations/20221220-162511
git checkout d92c5ad60bf90c257eee5583ebc1bab12cde716d
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=x86_64 SHELL=/bin/bash drivers/gpu/drm/i915/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/i915/display/intel_atomic_plane.c:918:3: error: implicit declaration of function 'skl_plane_max_scale' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
skl_plane_max_scale(i915, fb,
^
1 error generated.
--
>> drivers/gpu/drm/i915/display/intel_sprite.c:1362:7: error: use of undeclared identifier 'DISPLAY_VER'
DISPLAY_VER,
^
1 error generated.
vim +/skl_plane_max_scale +918 drivers/gpu/drm/i915/display/intel_atomic_plane.c
887
888 int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
889 struct intel_crtc_state *crtc_state,
890 bool allow_scaling,
891 bool can_position)
892 {
893 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
894 struct drm_framebuffer *fb = plane_state->hw.fb;
895 struct drm_rect *src = &plane_state->uapi.src;
896 struct drm_rect *dst = &plane_state->uapi.dst;
897 const struct drm_rect *clip = &crtc_state->pipe_src;
898 unsigned int rotation = plane_state->hw.rotation;
899 int hscale, vscale;
900 int max_hscale, min_hscale, max_vscale, min_vscale;
901
902 if (!fb) {
903 plane_state->uapi.visible = false;
904 return 0;
905 }
906
907 /*
908 * At this point we don't really know the HW limitations, so
909 * we just sanitize the values against the maximum supported
910 * scaling.
911 */
912 if (!allow_scaling) {
913 min_hscale = DRM_PLANE_NO_SCALING;
914 max_hscale = DRM_PLANE_NO_SCALING;
915 min_vscale = DRM_PLANE_NO_SCALING;
916 max_vscale = DRM_PLANE_NO_SCALING;
917 } else {
> 918 skl_plane_max_scale(i915, fb,
919 &max_hscale, &min_hscale,
920 &max_vscale, &min_vscale);
921 }
922
923 drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation);
924
925 /* Check scaling */
926 hscale = drm_rect_calc_hscale(src, dst, min_hscale, max_hscale);
927 vscale = drm_rect_calc_vscale(src, dst, min_vscale, max_vscale);
928 if (hscale < 0 || vscale < 0) {
929 drm_dbg_kms(&i915->drm,
930 "Invalid scaling of plane: hscale 0x%x vscale 0x%x\n",
931 hscale, vscale);
932 drm_dbg_kms(&i915->drm,
933 "min_hscale 0x%0x max_hscale 0x%0x min_vscale 0x%0x max_vscale 0x%0x\n",
934 min_hscale, max_hscale, min_vscale, max_vscale);
935 drm_rect_debug_print("src: ", src, true);
936 drm_rect_debug_print("dst: ", dst, false);
937 return -ERANGE;
938 }
939
940 /*
941 * FIXME: This might need further adjustment for seamless scaling
942 * with phase information, for the 2p2 and 2p1 scenarios.
943 */
944 plane_state->uapi.visible = drm_rect_clip_scaled(src, dst, clip);
945
946 drm_rect_rotate_inv(src, fb->width << 16, fb->height << 16, rotation);
947
948 if (!can_position && plane_state->uapi.visible &&
949 !drm_rect_equals(dst, clip)) {
950 drm_dbg_kms(&i915->drm, "Plane must cover entire CRTC\n");
951 drm_rect_debug_print("dst: ", dst, false);
952 drm_rect_debug_print("clip: ", clip, false);
953 return -EINVAL;
954 }
955
956 /* final plane coordinates will be relative to the plane's pipe */
957 drm_rect_translate(dst, -clip->x1, -clip->y1);
958
959 return 0;
960 }
961
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index ecaeb7dc196b..390e96f0692b 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -326,9 +326,7 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state, if (ret) return ret; - ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, - DRM_PLANE_NO_SCALING, - DRM_PLANE_NO_SCALING, + ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, false, i9xx_plane_has_windowing(plane)); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c b/drivers/gpu/drm/i915/display/intel_atomic.c index 6621aa245caf..bf4761a40675 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic.c +++ b/drivers/gpu/drm/i915/display/intel_atomic.c @@ -38,6 +38,7 @@ #include "intel_atomic.h" #include "intel_cdclk.h" #include "intel_display_types.h" +#include "intel_fb.h" #include "intel_global_state.h" #include "intel_hdcp.h" #include "intel_psr.h" @@ -310,11 +311,11 @@ intel_crtc_destroy_state(struct drm_crtc *crtc, kfree(crtc_state); } -static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state, - int num_scalers_need, struct intel_crtc *intel_crtc, - const char *name, int idx, - struct intel_plane_state *plane_state, - int *scaler_id) +static int intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state, + int num_scalers_need, struct intel_crtc *intel_crtc, + const char *name, int idx, + struct intel_plane_state *plane_state, + int *scaler_id) { struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); int j; @@ -334,7 +335,7 @@ static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_sta if (drm_WARN(&dev_priv->drm, *scaler_id < 0, "Cannot find scaler for %s:%d\n", name, idx)) - return; + return -EBUSY; /* set scaler mode */ if (plane_state && plane_state->hw.fb && @@ -375,9 +376,69 @@ static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_sta mode = SKL_PS_SCALER_MODE_DYN; } + /* + * FIXME: we should also check the scaler factors for pfit, so + * this shouldn't be tied directly to planes. + */ + if (plane_state && plane_state->hw.fb) { + const struct drm_framebuffer *fb = plane_state->hw.fb; + struct drm_rect *src = &plane_state->uapi.src; + struct drm_rect *dst = &plane_state->uapi.dst; + int hscale, vscale, max_vscale, max_hscale; + + /* + * FIXME: When two scalers are needed, but only one of + * them needs to downscale, we should make sure that + * the one that needs downscaling support is assigned + * as the first scaler, so we don't reject downscaling + * unnecessarily. + */ + + if (DISPLAY_VER(dev_priv) >= 14) { + /* + * On versions 14 and up, only the first + * scaler supports a vertical scaling factor + * of more than 1.0, while a horizontal + * scaling factor of 3.0 is supported. + */ + max_hscale = 0x30000 - 1; + if (*scaler_id == 0) + max_vscale = 0x30000 - 1; + else + max_vscale = 0x10000; + + } else if (DISPLAY_VER(dev_priv) >= 10 || + !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) { + max_hscale = 0x30000 - 1; + max_vscale = 0x30000 - 1; + } else { + max_hscale = 0x20000 - 1; + max_vscale = 0x20000 - 1; + } + + /* Check if required scaling is within limits */ + hscale = drm_rect_calc_hscale(src, dst, 1, max_hscale); + vscale = drm_rect_calc_vscale(src, dst, 1, max_vscale); + + if (hscale < 0 || vscale < 0) { + drm_dbg_kms(&dev_priv->drm, + "Scaler %d doesn't support required plane scaling\n", + *scaler_id); + drm_rect_debug_print("src: ", src, true); + drm_rect_debug_print("dst: ", dst, false); + + scaler_state->scalers[*scaler_id].in_use = 0; + *scaler_id = -1; + + return -EOPNOTSUPP; + } + } + drm_dbg_kms(&dev_priv->drm, "Attached scaler id %u.%u to %s:%d\n", intel_crtc->pipe, *scaler_id, name, idx); scaler_state->scalers[*scaler_id].mode = mode; + + return 0; } /** @@ -437,7 +498,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) { int *scaler_id; const char *name; - int idx; + int idx, ret; /* skip if scaler not required */ if (!(scaler_state->scaler_users & (1 << i))) @@ -494,9 +555,11 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, scaler_id = &plane_state->scaler_id; } - intel_atomic_setup_scaler(scaler_state, num_scalers_need, - intel_crtc, name, idx, - plane_state, scaler_id); + ret = intel_atomic_setup_scaler(scaler_state, num_scalers_need, + intel_crtc, name, idx, + plane_state, scaler_id); + if (ret) + return ret; } return 0; diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 10e1fc9d0698..50a05ccd2dda 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -887,7 +887,7 @@ void intel_crtc_planes_update_arm(struct intel_atomic_state *state, int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state, struct intel_crtc_state *crtc_state, - int min_scale, int max_scale, + bool allow_scaling, bool can_position) { struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); @@ -897,19 +897,41 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state, const struct drm_rect *clip = &crtc_state->pipe_src; unsigned int rotation = plane_state->hw.rotation; int hscale, vscale; + int max_hscale, min_hscale, max_vscale, min_vscale; if (!fb) { plane_state->uapi.visible = false; return 0; } + /* + * At this point we don't really know the HW limitations, so + * we just sanitize the values against the maximum supported + * scaling. + */ + if (!allow_scaling) { + min_hscale = DRM_PLANE_NO_SCALING; + max_hscale = DRM_PLANE_NO_SCALING; + min_vscale = DRM_PLANE_NO_SCALING; + max_vscale = DRM_PLANE_NO_SCALING; + } else { + skl_plane_max_scale(i915, fb, + &max_hscale, &min_hscale, + &max_vscale, &min_vscale); + } + drm_rect_rotate(src, fb->width << 16, fb->height << 16, rotation); /* Check scaling */ - hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale); - vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale); + hscale = drm_rect_calc_hscale(src, dst, min_hscale, max_hscale); + vscale = drm_rect_calc_vscale(src, dst, min_vscale, max_vscale); if (hscale < 0 || vscale < 0) { - drm_dbg_kms(&i915->drm, "Invalid scaling of plane\n"); + drm_dbg_kms(&i915->drm, + "Invalid scaling of plane: hscale 0x%x vscale 0x%x\n", + hscale, vscale); + drm_dbg_kms(&i915->drm, + "min_hscale 0x%0x max_hscale 0x%0x min_vscale 0x%0x max_vscale 0x%0x\n", + min_hscale, max_hscale, min_vscale, max_vscale); drm_rect_debug_print("src: ", src, true); drm_rect_debug_print("dst: ", dst, false); return -ERANGE; diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h index 74b6d3b169a7..441ef8165212 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h @@ -60,7 +60,7 @@ int intel_plane_calc_min_cdclk(struct intel_atomic_state *state, bool *need_cdclk_calc); int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state, struct intel_crtc_state *crtc_state, - int min_scale, int max_scale, + bool check_scaling, bool can_position); void intel_plane_set_invisible(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state); diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c index d190fa0d393b..741ec74f54f6 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor.c +++ b/drivers/gpu/drm/i915/display/intel_cursor.c @@ -144,9 +144,7 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state, } ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, - DRM_PLANE_NO_SCALING, - DRM_PLANE_NO_SCALING, - true); + false, true); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index e6b4d24b9cd0..4aa247e190a5 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -1355,22 +1355,12 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state, { struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct drm_i915_private *dev_priv = to_i915(plane->base.dev); - int min_scale = DRM_PLANE_NO_SCALING; - int max_scale = DRM_PLANE_NO_SCALING; int ret; - if (g4x_fb_scalable(plane_state->hw.fb)) { - if (DISPLAY_VER(dev_priv) < 7) { - min_scale = 1; - max_scale = 16 << 16; - } else if (IS_IVYBRIDGE(dev_priv)) { - min_scale = 1; - max_scale = 2 << 16; - } - } - ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, - min_scale, max_scale, true); + g4x_fb_scalable(plane_state->hw.fb) && + DISPLAY_VER, + true); if (ret) return ret; @@ -1426,9 +1416,7 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state, return ret; ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, - DRM_PLANE_NO_SCALING, - DRM_PLANE_NO_SCALING, - true); + false, true); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 76490cc59d8f..c3e6e45a0d4b 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -388,6 +388,25 @@ static int glk_plane_max_width(const struct drm_framebuffer *fb, } } +static void skl_plane_max_scale(struct drm_i915_private *i915, + struct drm_framebuffer *fb, + int *max_hscale, int *min_hscale, + int *max_vscale, int *min_vscale) +{ + *min_vscale = 1; + *min_hscale = 1; + + if (DISPLAY_VER(i915) < 10 || + intel_format_info_is_yuv_semiplanar(fb->format, + fb->modifier)) { + *max_vscale = 0x20000 - 1; + *max_hscale = 0x20000 - 1; + } else { + *max_vscale = 0x30000 - 1; + *max_hscale = 0x30000 - 1; + } +} + static int icl_plane_min_width(const struct drm_framebuffer *fb, int color_plane, unsigned int rotation) @@ -1463,22 +1482,6 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s return 0; } -static int skl_plane_max_scale(struct drm_i915_private *dev_priv, - const struct drm_framebuffer *fb) -{ - /* - * We don't yet know the final source width nor - * whether we can use the HQ scaler mode. Assume - * the best case. - * FIXME need to properly check this later. - */ - if (DISPLAY_VER(dev_priv) >= 10 || - !intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) - return 0x30000 - 1; - else - return 0x20000 - 1; -} - static int intel_plane_min_width(struct intel_plane *plane, const struct drm_framebuffer *fb, int color_plane, @@ -1862,8 +1865,7 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct drm_i915_private *dev_priv = to_i915(plane->base.dev); const struct drm_framebuffer *fb = plane_state->hw.fb; - int min_scale = DRM_PLANE_NO_SCALING; - int max_scale = DRM_PLANE_NO_SCALING; + bool allow_scaling; int ret; ret = skl_plane_check_fb(crtc_state, plane_state); @@ -1871,13 +1873,10 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, return ret; /* use scaler when colorkey is not required */ - if (!plane_state->ckey.flags && skl_fb_scalable(fb)) { - min_scale = 1; - max_scale = skl_plane_max_scale(dev_priv, fb); - } + allow_scaling = !plane_state->ckey.flags && skl_fb_scalable(fb); ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, - min_scale, max_scale, true); + allow_scaling, true); if (ret) return ret;
In newer hardware versions (i.e. display version >= 14), the second scaler doesn't support vertical scaling. The current implementation of the scaling limits is simplified and only occurs when the planes are created, so we don't know which scaler is being used. In order to handle separate scaling limits for horizontal and vertical scaling, and different limits per scaler, split the checks in two phases. We first do a simple check during plane creation and use the best-case scenario (because we don't know the scaler that may be used at a later point) and then do a more specific check when the scalers are actually being set up. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> --- In v2: * fix DRM_PLANE_NO_SCALING renamed macros; In v3: * No changes. In v4: * Got rid of the changes in the general planes max scale code; * Added a couple of FIXMEs; * Made intel_atomic_setup_scaler() return an int with errors; In v5: * Just resent with a cover letter. drivers/gpu/drm/i915/display/i9xx_plane.c | 4 +- drivers/gpu/drm/i915/display/intel_atomic.c | 83 ++++++++++++++++--- .../gpu/drm/i915/display/intel_atomic_plane.c | 30 ++++++- .../gpu/drm/i915/display/intel_atomic_plane.h | 2 +- drivers/gpu/drm/i915/display/intel_cursor.c | 4 +- drivers/gpu/drm/i915/display/intel_sprite.c | 20 +---- .../drm/i915/display/skl_universal_plane.c | 45 +++++----- 7 files changed, 128 insertions(+), 60 deletions(-)