diff mbox series

drm/i915: update src and dst scaler limits for display ver 12 and 13

Message ID 20221223185719.56565-1-luciano.coelho@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: update src and dst scaler limits for display ver 12 and 13 | expand

Commit Message

Luca Coelho Dec. 23, 2022, 6:57 p.m. UTC
The bspec has been updated and now display versions 12 and 13 support
source width up to 5120 pixels, source height up to 8192 lines,
destination width up to 8192 and destination height up to 8192.

Update the code accordingly.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/skl_scaler.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

Comments

Nautiyal, Ankit K Jan. 13, 2023, 10:34 a.m. UTC | #1
Hi Luca,

Patch looks good to me. Please add 'Bspec:50441' in commit message for 
reference.

Also, you might need to re-submit for test, as last time the other 
scaler changes were not merged, and CI build had failed.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


Thanks & Regards,

Ankit


On 12/24/2022 12:27 AM, Luca Coelho wrote:
> The bspec has been updated and now display versions 12 and 13 support
> source width up to 5120 pixels, source height up to 8192 lines,
> destination width up to 8192 and destination height up to 8192.
>
> Update the code accordingly.
>
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
>   drivers/gpu/drm/i915/display/skl_scaler.c | 11 ++++++++++-
>   1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 01e881293612..473d53610b92 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -87,6 +87,10 @@ static u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_cosited)
>   #define ICL_MAX_SRC_H 4096
>   #define ICL_MAX_DST_W 5120
>   #define ICL_MAX_DST_H 4096
> +#define TGL_MAX_SRC_W 5120
> +#define TGL_MAX_SRC_H 8192
> +#define TGL_MAX_DST_W 8192
> +#define TGL_MAX_DST_H 8192
>   #define MTL_MAX_SRC_W 4096
>   #define MTL_MAX_SRC_H 8192
>   #define MTL_MAX_DST_W 8192
> @@ -173,11 +177,16 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
>   		max_src_h = SKL_MAX_SRC_H;
>   		max_dst_w = SKL_MAX_DST_W;
>   		max_dst_h = SKL_MAX_DST_H;
> -	} else if (DISPLAY_VER(dev_priv) < 14) {
> +	} else if (DISPLAY_VER(dev_priv) < 12) {
>   		max_src_w = ICL_MAX_SRC_W;
>   		max_src_h = ICL_MAX_SRC_H;
>   		max_dst_w = ICL_MAX_DST_W;
>   		max_dst_h = ICL_MAX_DST_H;
> +	} else if (DISPLAY_VER(dev_priv) < 14) {
> +		max_src_w = TGL_MAX_SRC_W;
> +		max_src_h = TGL_MAX_SRC_H;
> +		max_dst_w = TGL_MAX_DST_W;
> +		max_dst_h = TGL_MAX_DST_H;
>   	} else {
>   		max_src_w = MTL_MAX_SRC_W;
>   		max_src_h = MTL_MAX_SRC_H;
Luca Coelho Jan. 13, 2023, 10:43 a.m. UTC | #2
On Fri, 2023-01-13 at 16:04 +0530, Nautiyal, Ankit K wrote:
> Hi Luca,

Hi Ankit,


> Patch looks good to me. Please add 'Bspec:50441' in commit message for 
> reference.

Good point, I'll add it and resend.


> Also, you might need to re-submit for test, as last time the other 
> scaler changes were not merged, and CI build had failed.

I'll have to resend it anyway because of the bspec tag, so it will run
again.


> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Thanks a lot!

--
Cheers,
Luca.
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 01e881293612..473d53610b92 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -87,6 +87,10 @@  static u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_cosited)
 #define ICL_MAX_SRC_H 4096
 #define ICL_MAX_DST_W 5120
 #define ICL_MAX_DST_H 4096
+#define TGL_MAX_SRC_W 5120
+#define TGL_MAX_SRC_H 8192
+#define TGL_MAX_DST_W 8192
+#define TGL_MAX_DST_H 8192
 #define MTL_MAX_SRC_W 4096
 #define MTL_MAX_SRC_H 8192
 #define MTL_MAX_DST_W 8192
@@ -173,11 +177,16 @@  skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
 		max_src_h = SKL_MAX_SRC_H;
 		max_dst_w = SKL_MAX_DST_W;
 		max_dst_h = SKL_MAX_DST_H;
-	} else if (DISPLAY_VER(dev_priv) < 14) {
+	} else if (DISPLAY_VER(dev_priv) < 12) {
 		max_src_w = ICL_MAX_SRC_W;
 		max_src_h = ICL_MAX_SRC_H;
 		max_dst_w = ICL_MAX_DST_W;
 		max_dst_h = ICL_MAX_DST_H;
+	} else if (DISPLAY_VER(dev_priv) < 14) {
+		max_src_w = TGL_MAX_SRC_W;
+		max_src_h = TGL_MAX_SRC_H;
+		max_dst_w = TGL_MAX_DST_W;
+		max_dst_h = TGL_MAX_DST_H;
 	} else {
 		max_src_w = MTL_MAX_SRC_W;
 		max_src_h = MTL_MAX_SRC_H;