| Message ID | 20230117202627.4134579-1-matthew.d.roper@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Move/adjust register definitions related to Wa_22011450934 | expand |
On Tue, Jan 17, 2023 at 12:26:27PM -0800, Matt Roper wrote: > The implementation of Wa_22011450934 introduced three new register > definitions in i915_reg.h that didn't get moved to the GT/engine > register headers when all the other registers moved; let's move them to > the appropriate headers and tidy up their definitions now for > consistency: > > - STATE_ACK_DEBUG is moved to the engine register header and converted > to a parameterized definition; the workaround only needs the RCS > instance to be programmed, but there are instances on other engines > that could be used by other workarounds in the future. > > - The two CULLBIT registers move to the GT register header. Since > they belong to MMIO ranges that became MCR starting with Xe_HP, > their definitions should be defined as MCR_REG() and use an Xe_HP > prefix to keep the register semantics clear. > > Note that the MCR definition is just for consistency and to prevent > accidental misuse if other workarounds related to these registers show > up in the future. There's no functional change to today's driver since > the workaround that references these registers only accesses them via > MI_LRR engine instructions. Engine-initiated register accesses do not > utilize the same same steering controls as CPU-initiated accesses; they > use a different steering control register (0x20CC) which is initialized > to a non-terminated DSS target by pre-OS firmware and never changed > thereafter (i915 does not touch it and userspace does not have > permission to change that register). > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_engine_regs.h | 1 + > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ > drivers/gpu/drm/i915/gt/intel_lrc.c | 6 +++--- > drivers/gpu/drm/i915/i915_reg.h | 4 ---- > 4 files changed, 8 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_regs.h b/drivers/gpu/drm/i915/gt/intel_engine_regs.h > index ee3efd06ee54..6b9d9f837669 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_regs.h > +++ b/drivers/gpu/drm/i915/gt/intel_engine_regs.h > @@ -81,6 +81,7 @@ > #define RING_EIR(base) _MMIO((base) + 0xb0) > #define RING_EMR(base) _MMIO((base) + 0xb4) > #define RING_ESR(base) _MMIO((base) + 0xb8) > +#define GEN12_STATE_ACK_DEBUG(base) _MMIO((base) + 0xbc) > #define RING_INSTPM(base) _MMIO((base) + 0xc0) > #define RING_CMD_CCTL(base) _MMIO((base) + 0xc4) > #define ACTHD(base) _MMIO((base) + 0xc8) > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > index 4f5c06d60bcd..4a4bab261e66 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > @@ -407,6 +407,8 @@ > #define GEN9_WM_CHICKEN3 _MMIO(0x5588) > #define GEN9_FACTOR_IN_CLR_VAL_HIZ (1 << 9) > > +#define XEHP_CULLBIT1 MCR_REG(0x6100) > + > #define CHICKEN_RASTER_1 MCR_REG(0x6204) > #define DIS_SF_ROUND_NEAREST_EVEN REG_BIT(8) > > @@ -457,6 +459,8 @@ > #define HZ_DEPTH_TEST_LE_GE_OPT_DISABLE REG_BIT(13) > #define BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE REG_BIT(3) > > +#define XEHP_CULLBIT2 MCR_REG(0x7030) > + > #define GEN8_L3CNTLREG _MMIO(0x7034) > #define GEN8_ERRDETBCTRL (1 << 9) > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 7771a19008c6..1dffe392b95c 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1351,16 +1351,16 @@ static u32 * > dg2_emit_rcs_hang_wabb(const struct intel_context *ce, u32 *cs) > { > *cs++ = MI_LOAD_REGISTER_IMM(1); > - *cs++ = i915_mmio_reg_offset(GEN12_STATE_ACK_DEBUG); > + *cs++ = i915_mmio_reg_offset(GEN12_STATE_ACK_DEBUG(ce->engine->mmio_base)); > *cs++ = 0x21; > > *cs++ = MI_LOAD_REGISTER_REG; > *cs++ = i915_mmio_reg_offset(RING_NOPID(ce->engine->mmio_base)); > - *cs++ = i915_mmio_reg_offset(GEN12_CULLBIT1); > + *cs++ = i915_mmio_reg_offset(XEHP_CULLBIT1); > > *cs++ = MI_LOAD_REGISTER_REG; > *cs++ = i915_mmio_reg_offset(RING_NOPID(ce->engine->mmio_base)); > - *cs++ = i915_mmio_reg_offset(GEN12_CULLBIT2); > + *cs++ = i915_mmio_reg_offset(XEHP_CULLBIT2); > > return cs; > } > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 8b2cf980f323..d30443f06bdd 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -8113,10 +8113,6 @@ enum skl_power_gate { > #define CLKGATE_DIS_MISC _MMIO(0x46534) > #define CLKGATE_DIS_MISC_DMASC_GATING_DIS REG_BIT(21) > > -#define GEN12_CULLBIT1 _MMIO(0x6100) > -#define GEN12_CULLBIT2 _MMIO(0x7030) > -#define GEN12_STATE_ACK_DEBUG _MMIO(0x20BC) > - > #define _MTL_CLKGATE_DIS_TRANS_A 0x604E8 > #define _MTL_CLKGATE_DIS_TRANS_B 0x614E8 > #define MTL_CLKGATE_DIS_TRANS(trans) _MMIO_TRANS2(trans, _MTL_CLKGATE_DIS_TRANS_A) > -- > 2.39.0 >
On Wed, Jan 18, 2023 at 12:07:01PM +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915: Move/adjust register definitions related to Wa_22011450934 > URL : https://patchwork.freedesktop.org/series/112966/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_12594_full -> Patchwork_112966v1_full > ==================================================== > > Summary > ------- > > **SUCCESS** Applied to drm-intel-gt-next. Thanks Gustavo for the review. Matt > > No regressions found. > > External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/index.html > > Participating hosts (13 -> 10) > ------------------------------ > > Missing (3): pig-skl-6260u pig-kbl-iris pig-glk-j5005 > > Known issues > ------------ > > Here are the changes found in Patchwork_112966v1_full that come from known issues: > > ### IGT changes ### > > #### Issues hit #### > > * igt@gem_exec_fair@basic-pace-share@rcs0: > - shard-glk: [PASS][1] -> [FAIL][2] ([i915#2842]) +2 similar issues > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html > > * igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a1: > - shard-glk: [PASS][3] -> [FAIL][4] ([i915#79]) > [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-glk1/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a1.html > [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-glk1/igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a1.html > > * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt: > - shard-glk: NOTRUN -> [SKIP][5] ([fdo#109271]) +24 similar issues > [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-glk3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html > > > #### Possible fixes #### > > * igt@fbdev@nullptr: > - {shard-rkl}: [SKIP][6] ([i915#2582]) -> [PASS][7] +1 similar issue > [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-5/igt@fbdev@nullptr.html > [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-6/igt@fbdev@nullptr.html > > * igt@gem_bad_reloc@negative-reloc-lut: > - {shard-rkl}: [SKIP][8] ([i915#3281]) -> [PASS][9] +4 similar issues > [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-1/igt@gem_bad_reloc@negative-reloc-lut.html > [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-5/igt@gem_bad_reloc@negative-reloc-lut.html > > * igt@gem_exec_fair@basic-none-solo@rcs0: > - {shard-rkl}: [FAIL][10] ([i915#2842]) -> [PASS][11] > [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-4/igt@gem_exec_fair@basic-none-solo@rcs0.html > [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-4/igt@gem_exec_fair@basic-none-solo@rcs0.html > > * igt@gem_exec_flush@basic-batch-kernel-default-cmd: > - {shard-rkl}: [SKIP][12] ([fdo#109313]) -> [PASS][13] > [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-6/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html > [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-5/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html > > * igt@gem_mmap_gtt@coherency: > - {shard-rkl}: [SKIP][14] ([fdo#111656]) -> [PASS][15] > [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-1/igt@gem_mmap_gtt@coherency.html > [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-5/igt@gem_mmap_gtt@coherency.html > > * igt@gen9_exec_parse@allowed-all: > - shard-glk: [DMESG-WARN][16] ([i915#5566] / [i915#716]) -> [PASS][17] > [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-glk8/igt@gen9_exec_parse@allowed-all.html > [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-glk3/igt@gen9_exec_parse@allowed-all.html > > * igt@gen9_exec_parse@bb-chained: > - {shard-rkl}: [SKIP][18] ([i915#2527]) -> [PASS][19] +1 similar issue > [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-2/igt@gen9_exec_parse@bb-chained.html > [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-5/igt@gen9_exec_parse@bb-chained.html > > * igt@i915_pm_dc@dc6-dpms: > - {shard-rkl}: [SKIP][20] ([i915#3361]) -> [PASS][21] > [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-5/igt@i915_pm_dc@dc6-dpms.html > [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-6/igt@i915_pm_dc@dc6-dpms.html > > * igt@i915_pm_rc6_residency@rc6-idle@rcs0: > - {shard-dg1}: [FAIL][22] ([i915#3591]) -> [PASS][23] > [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html > [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html > > * igt@i915_suspend@basic-s3-without-i915: > - {shard-rkl}: [FAIL][24] ([fdo#103375]) -> [PASS][25] > [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-3/igt@i915_suspend@basic-s3-without-i915.html > [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-1/igt@i915_suspend@basic-s3-without-i915.html > > * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions: > - shard-glk: [FAIL][26] ([i915#2346]) -> [PASS][27] > [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html > [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html > > * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite: > - {shard-rkl}: [SKIP][28] ([i915#1849] / [i915#4098]) -> [PASS][29] +11 similar issues > [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html > [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-pwrite.html > > * igt@kms_properties@crtc-properties-legacy: > - {shard-rkl}: [SKIP][30] ([i915#1849]) -> [PASS][31] +3 similar issues > [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-2/igt@kms_properties@crtc-properties-legacy.html > [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-6/igt@kms_properties@crtc-properties-legacy.html > > * igt@kms_psr@sprite_mmap_cpu: > - {shard-rkl}: [SKIP][32] ([i915#1072]) -> [PASS][33] +2 similar issues > [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-2/igt@kms_psr@sprite_mmap_cpu.html > [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-6/igt@kms_psr@sprite_mmap_cpu.html > > * igt@kms_universal_plane@disable-primary-vs-flip-pipe-b: > - {shard-rkl}: [SKIP][34] ([i915#1845] / [i915#4070] / [i915#4098]) -> [PASS][35] > [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-2/igt@kms_universal_plane@disable-primary-vs-flip-pipe-b.html > [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-6/igt@kms_universal_plane@disable-primary-vs-flip-pipe-b.html > > * igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a: > - {shard-rkl}: [SKIP][36] ([i915#4098]) -> [PASS][37] > [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-5/igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a.html > [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-6/igt@kms_universal_plane@universal-plane-pageflip-windowed-pipe-a.html > > * igt@kms_vblank@pipe-b-query-idle: > - {shard-rkl}: [SKIP][38] ([i915#1845] / [i915#4098]) -> [PASS][39] +28 similar issues > [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-2/igt@kms_vblank@pipe-b-query-idle.html > [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-6/igt@kms_vblank@pipe-b-query-idle.html > > * igt@perf@mi-rpc: > - {shard-rkl}: [SKIP][40] ([i915#2434]) -> [PASS][41] > [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-rkl-6/igt@perf@mi-rpc.html > [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-rkl-5/igt@perf@mi-rpc.html > > * igt@sysfs_heartbeat_interval@precise@vcs1: > - {shard-dg1}: [FAIL][42] ([i915#1755]) -> [PASS][43] +1 similar issue > [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12594/shard-dg1-16/igt@sysfs_heartbeat_interval@precise@vcs1.html > [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/shard-dg1-16/igt@sysfs_heartbeat_interval@precise@vcs1.html > > > {name}: This element is suppressed. This means it is ignored when computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > > [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 > [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 > [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 > [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279 > [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 > [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283 > [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 > [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 > [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303 > [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 > [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313 > [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314 > [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 > [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 > [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 > [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542 > [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 > [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 > [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 > [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 > [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644 > [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656 > [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 > [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 > [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054 > [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 > [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 > [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132 > [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 > [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722 > [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755 > [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769 > [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 > [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 > [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 > [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 > [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902 > [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 > [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 > [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434 > [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 > [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 > [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 > [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 > [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 > [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658 > [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 > [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 > [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 > [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 > [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 > [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 > [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920 > [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994 > [i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315 > [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 > [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 > [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 > [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 > [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318 > [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 > [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361 > [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528 > [i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536 > [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 > [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 > [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 > [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 > [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 > [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 > [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 > [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734 > [i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778 > [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 > [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989 > [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404 > [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 > [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 > [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 > [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 > [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 > [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215 > [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426 > [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 > [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281 > [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 > [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 > [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767 > [i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877 > [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 > [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 > [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 > [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288 > [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289 > [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 > [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327 > [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 > [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439 > [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461 > [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563 > [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566 > [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723 > [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 > [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117 > [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245 > [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248 > [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252 > [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268 > [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335 > [i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344 > [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433 > [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497 > [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 > [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 > [i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590 > [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768 > [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944 > [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946 > [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953 > [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116 > [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 > [i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128 > [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716 > [i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294 > [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561 > [i915#7582]: https://gitlab.freedesktop.org/drm/intel/issues/7582 > [i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651 > [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697 > [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701 > [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711 > [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742 > [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 > [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 > > > Build changes > ------------- > > * Linux: CI_DRM_12594 -> Patchwork_112966v1 > * Piglit: piglit_4509 -> None > > CI-20190529: 20190529 > CI_DRM_12594: 5cec9cff5436577179bab7b52de0465ba169691a @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_7121: aa16e81259f59734230d441905b9d0f605e4a4b5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git > Patchwork_112966v1: 5cec9cff5436577179bab7b52de0465ba169691a @ git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112966v1/index.html
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_regs.h b/drivers/gpu/drm/i915/gt/intel_engine_regs.h index ee3efd06ee54..6b9d9f837669 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_regs.h @@ -81,6 +81,7 @@ #define RING_EIR(base) _MMIO((base) + 0xb0) #define RING_EMR(base) _MMIO((base) + 0xb4) #define RING_ESR(base) _MMIO((base) + 0xb8) +#define GEN12_STATE_ACK_DEBUG(base) _MMIO((base) + 0xbc) #define RING_INSTPM(base) _MMIO((base) + 0xc0) #define RING_CMD_CCTL(base) _MMIO((base) + 0xc4) #define ACTHD(base) _MMIO((base) + 0xc8) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 4f5c06d60bcd..4a4bab261e66 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -407,6 +407,8 @@ #define GEN9_WM_CHICKEN3 _MMIO(0x5588) #define GEN9_FACTOR_IN_CLR_VAL_HIZ (1 << 9) +#define XEHP_CULLBIT1 MCR_REG(0x6100) + #define CHICKEN_RASTER_1 MCR_REG(0x6204) #define DIS_SF_ROUND_NEAREST_EVEN REG_BIT(8) @@ -457,6 +459,8 @@ #define HZ_DEPTH_TEST_LE_GE_OPT_DISABLE REG_BIT(13) #define BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE REG_BIT(3) +#define XEHP_CULLBIT2 MCR_REG(0x7030) + #define GEN8_L3CNTLREG _MMIO(0x7034) #define GEN8_ERRDETBCTRL (1 << 9) diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 7771a19008c6..1dffe392b95c 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -1351,16 +1351,16 @@ static u32 * dg2_emit_rcs_hang_wabb(const struct intel_context *ce, u32 *cs) { *cs++ = MI_LOAD_REGISTER_IMM(1); - *cs++ = i915_mmio_reg_offset(GEN12_STATE_ACK_DEBUG); + *cs++ = i915_mmio_reg_offset(GEN12_STATE_ACK_DEBUG(ce->engine->mmio_base)); *cs++ = 0x21; *cs++ = MI_LOAD_REGISTER_REG; *cs++ = i915_mmio_reg_offset(RING_NOPID(ce->engine->mmio_base)); - *cs++ = i915_mmio_reg_offset(GEN12_CULLBIT1); + *cs++ = i915_mmio_reg_offset(XEHP_CULLBIT1); *cs++ = MI_LOAD_REGISTER_REG; *cs++ = i915_mmio_reg_offset(RING_NOPID(ce->engine->mmio_base)); - *cs++ = i915_mmio_reg_offset(GEN12_CULLBIT2); + *cs++ = i915_mmio_reg_offset(XEHP_CULLBIT2); return cs; } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 8b2cf980f323..d30443f06bdd 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8113,10 +8113,6 @@ enum skl_power_gate { #define CLKGATE_DIS_MISC _MMIO(0x46534) #define CLKGATE_DIS_MISC_DMASC_GATING_DIS REG_BIT(21) -#define GEN12_CULLBIT1 _MMIO(0x6100) -#define GEN12_CULLBIT2 _MMIO(0x7030) -#define GEN12_STATE_ACK_DEBUG _MMIO(0x20BC) - #define _MTL_CLKGATE_DIS_TRANS_A 0x604E8 #define _MTL_CLKGATE_DIS_TRANS_B 0x614E8 #define MTL_CLKGATE_DIS_TRANS(trans) _MMIO_TRANS2(trans, _MTL_CLKGATE_DIS_TRANS_A)
The implementation of Wa_22011450934 introduced three new register definitions in i915_reg.h that didn't get moved to the GT/engine register headers when all the other registers moved; let's move them to the appropriate headers and tidy up their definitions now for consistency: - STATE_ACK_DEBUG is moved to the engine register header and converted to a parameterized definition; the workaround only needs the RCS instance to be programmed, but there are instances on other engines that could be used by other workarounds in the future. - The two CULLBIT registers move to the GT register header. Since they belong to MMIO ranges that became MCR starting with Xe_HP, their definitions should be defined as MCR_REG() and use an Xe_HP prefix to keep the register semantics clear. Note that the MCR definition is just for consistency and to prevent accidental misuse if other workarounds related to these registers show up in the future. There's no functional change to today's driver since the workaround that references these registers only accesses them via MI_LRR engine instructions. Engine-initiated register accesses do not utilize the same same steering controls as CPU-initiated accesses; they use a different steering control register (0x20CC) which is initialized to a non-terminated DSS target by pre-OS firmware and never changed thereafter (i915 does not touch it and userspace does not have permission to change that register). Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/gt/intel_engine_regs.h | 1 + drivers/gpu/drm/i915/gt/intel_gt_regs.h | 4 ++++ drivers/gpu/drm/i915/gt/intel_lrc.c | 6 +++--- drivers/gpu/drm/i915/i915_reg.h | 4 ---- 4 files changed, 8 insertions(+), 7 deletions(-)