diff mbox series

[1/7] drm/i915: add i915_config.h and move relevant declarations there

Message ID 20230118131538.3558599-1-jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/7] drm/i915: add i915_config.h and move relevant declarations there | expand

Commit Message

Jani Nikula Jan. 18, 2023, 1:15 p.m. UTC
We already have i915_config.c. Add the i915_config.h counterpart, and
declutter i915_drv.h in the process.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../gpu/drm/i915/display/intel_atomic_plane.c |  1 +
 drivers/gpu/drm/i915/gem/i915_gem_clflush.c   |  1 +
 drivers/gpu/drm/i915/i915_config.c            |  5 +++-
 drivers/gpu/drm/i915/i915_config.h            | 23 +++++++++++++++++++
 drivers/gpu/drm/i915/i915_drv.h               |  9 --------
 drivers/gpu/drm/i915/i915_request.c           |  1 +
 6 files changed, 30 insertions(+), 10 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_config.h

Comments

Tvrtko Ursulin Jan. 18, 2023, 1:32 p.m. UTC | #1
On 18/01/2023 13:15, Jani Nikula wrote:
> We already have i915_config.c. Add the i915_config.h counterpart, and
> declutter i915_drv.h in the process.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>   .../gpu/drm/i915/display/intel_atomic_plane.c |  1 +
>   drivers/gpu/drm/i915/gem/i915_gem_clflush.c   |  1 +
>   drivers/gpu/drm/i915/i915_config.c            |  5 +++-
>   drivers/gpu/drm/i915/i915_config.h            | 23 +++++++++++++++++++
>   drivers/gpu/drm/i915/i915_drv.h               |  9 --------
>   drivers/gpu/drm/i915/i915_request.c           |  1 +
>   6 files changed, 30 insertions(+), 10 deletions(-)
>   create mode 100644 drivers/gpu/drm/i915/i915_config.h
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 10e1fc9d0698..1409bcfb6fd3 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -36,6 +36,7 @@
>   
>   #include "gt/intel_rps.h"
>   
> +#include "i915_config.h"
>   #include "intel_atomic_plane.h"
>   #include "intel_cdclk.h"
>   #include "intel_display_trace.h"
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
> index b3b398fe689c..385ffc575b48 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
> @@ -8,6 +8,7 @@
>   
>   #include "display/intel_frontbuffer.h"
>   
> +#include "i915_config.h"
>   #include "i915_drv.h"
>   #include "i915_gem_clflush.h"
>   #include "i915_sw_fence_work.h"
> diff --git a/drivers/gpu/drm/i915/i915_config.c b/drivers/gpu/drm/i915/i915_config.c
> index afb828dab53b..24e5bb8a670e 100644
> --- a/drivers/gpu/drm/i915/i915_config.c
> +++ b/drivers/gpu/drm/i915/i915_config.c
> @@ -3,7 +3,10 @@
>    * Copyright © 2020 Intel Corporation
>    */
>   
> -#include "i915_drv.h"
> +#include <linux/kernel.h>
> +
> +#include "i915_config.h"
> +#include "i915_utils.h"
>   
>   unsigned long
>   i915_fence_context_timeout(const struct drm_i915_private *i915, u64 context)
> diff --git a/drivers/gpu/drm/i915/i915_config.h b/drivers/gpu/drm/i915/i915_config.h
> new file mode 100644
> index 000000000000..10e18b036489
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_config.h
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef __I915_CONFIG_H__
> +#define __I915_CONFIG_H__
> +
> +#include <linux/types.h>
> +#include <linux/limits.h>
> +
> +struct drm_i915_private;
> +
> +unsigned long i915_fence_context_timeout(const struct drm_i915_private *i915,
> +					 u64 context);
> +
> +static inline unsigned long
> +i915_fence_timeout(const struct drm_i915_private *i915)
> +{
> +	return i915_fence_context_timeout(i915, U64_MAX);
> +}
> +
> +#endif /* __I915_CONFIG_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2ed3cb7e38d7..8377173e8de5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -196,15 +196,6 @@ struct i915_gem_mm {
>   
>   #define I915_IDLE_ENGINES_TIMEOUT (200) /* in ms */
>   
> -unsigned long i915_fence_context_timeout(const struct drm_i915_private *i915,
> -					 u64 context);
> -
> -static inline unsigned long
> -i915_fence_timeout(const struct drm_i915_private *i915)
> -{
> -	return i915_fence_context_timeout(i915, U64_MAX);
> -}
> -
>   #define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
>   
>   struct i915_virtual_gpu {
> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
> index f949a9495758..7503dcb9043b 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -43,6 +43,7 @@
>   #include "gt/intel_rps.h"
>   
>   #include "i915_active.h"
> +#include "i915_config.h"
>   #include "i915_deps.h"
>   #include "i915_driver.h"
>   #include "i915_drv.h"

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

It however made me spot the wasteful out of line call to 
i915_fence_context_timeout, with even u64 used as plain bool, so I might 
be tempted to do something about that as a follow up.

Regards,

Tvrtko
Jani Nikula Jan. 20, 2023, 8:22 a.m. UTC | #2
On Wed, 18 Jan 2023, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote:
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Thanks for the reviews and acks, pushed to drm-intel-next.

Despite having a lot of gem/gt stuff, I opted to use drm-intel-next
instead of drm-intel-gt-next, because I think the i915_drv.h changes
belong in din, and it's easier to sync din -> dign than vice versa.

BR,
Jani.

>
> It however made me spot the wasteful out of line call to 
> i915_fence_context_timeout, with even u64 used as plain bool, so I might 
> be tempted to do something about that as a follow up.
>
> Regards,
>
> Tvrtko
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 10e1fc9d0698..1409bcfb6fd3 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -36,6 +36,7 @@ 
 
 #include "gt/intel_rps.h"
 
+#include "i915_config.h"
 #include "intel_atomic_plane.h"
 #include "intel_cdclk.h"
 #include "intel_display_trace.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
index b3b398fe689c..385ffc575b48 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c
@@ -8,6 +8,7 @@ 
 
 #include "display/intel_frontbuffer.h"
 
+#include "i915_config.h"
 #include "i915_drv.h"
 #include "i915_gem_clflush.h"
 #include "i915_sw_fence_work.h"
diff --git a/drivers/gpu/drm/i915/i915_config.c b/drivers/gpu/drm/i915/i915_config.c
index afb828dab53b..24e5bb8a670e 100644
--- a/drivers/gpu/drm/i915/i915_config.c
+++ b/drivers/gpu/drm/i915/i915_config.c
@@ -3,7 +3,10 @@ 
  * Copyright © 2020 Intel Corporation
  */
 
-#include "i915_drv.h"
+#include <linux/kernel.h>
+
+#include "i915_config.h"
+#include "i915_utils.h"
 
 unsigned long
 i915_fence_context_timeout(const struct drm_i915_private *i915, u64 context)
diff --git a/drivers/gpu/drm/i915/i915_config.h b/drivers/gpu/drm/i915/i915_config.h
new file mode 100644
index 000000000000..10e18b036489
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_config.h
@@ -0,0 +1,23 @@ 
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef __I915_CONFIG_H__
+#define __I915_CONFIG_H__
+
+#include <linux/types.h>
+#include <linux/limits.h>
+
+struct drm_i915_private;
+
+unsigned long i915_fence_context_timeout(const struct drm_i915_private *i915,
+					 u64 context);
+
+static inline unsigned long
+i915_fence_timeout(const struct drm_i915_private *i915)
+{
+	return i915_fence_context_timeout(i915, U64_MAX);
+}
+
+#endif /* __I915_CONFIG_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2ed3cb7e38d7..8377173e8de5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -196,15 +196,6 @@  struct i915_gem_mm {
 
 #define I915_IDLE_ENGINES_TIMEOUT (200) /* in ms */
 
-unsigned long i915_fence_context_timeout(const struct drm_i915_private *i915,
-					 u64 context);
-
-static inline unsigned long
-i915_fence_timeout(const struct drm_i915_private *i915)
-{
-	return i915_fence_context_timeout(i915, U64_MAX);
-}
-
 #define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915))
 
 struct i915_virtual_gpu {
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index f949a9495758..7503dcb9043b 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -43,6 +43,7 @@ 
 #include "gt/intel_rps.h"
 
 #include "i915_active.h"
+#include "i915_config.h"
 #include "i915_deps.h"
 #include "i915_driver.h"
 #include "i915_drv.h"