| Message ID | 20230207074416.3209722-3-suraj.kandpal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable YCbCr420 for VDSC | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Suraj > Kandpal > Sent: Tuesday, February 7, 2023 1:14 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v9 2/7] drm/i915/dp: Check if DSC supports the given > output_format > > From: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > > Go with DSC only if the given output_format is supported. > > v2: Use drm helper to get DSC format support for sink. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 30 +++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index cb4fbcd935db..73a7baccd7d0 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1494,6 +1494,31 @@ static int intel_dp_dsc_compute_params(struct > intel_encoder *encoder, > return drm_dsc_compute_rc_parameters(vdsc_cfg); > } > > +static bool intel_dp_dsc_supports_format(struct intel_dp *intel_dp, > + enum intel_output_format output_format) > { > + u8 sink_dsc_format; > + > + switch (output_format) { > + case INTEL_OUTPUT_FORMAT_RGB: > + sink_dsc_format = DP_DSC_RGB; > + break; > + case INTEL_OUTPUT_FORMAT_YCBCR444: > + sink_dsc_format = DP_DSC_YCbCr444; > + break; > + case INTEL_OUTPUT_FORMAT_YCBCR420: > + if (min(intel_dp_source_dsc_version_minor(intel_dp), > + intel_dp_sink_dsc_version_minor(intel_dp)) < 2) > + return false; > + sink_dsc_format = DP_DSC_YCbCr420_Native; > + break; > + default: > + return false; > + } > + > + return drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, > +sink_dsc_format); } > + > int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, > struct intel_crtc_state *pipe_config, > struct drm_connector_state *conn_state, @@ - > 1514,11 +1539,16 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, > if (!intel_dp_supports_dsc(intel_dp, pipe_config)) > return -EINVAL; > > + if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format)) > + return -EINVAL; > + > if (compute_pipe_bpp) > pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state- > >max_requested_bpc); > else > pipe_bpp = pipe_config->pipe_bpp; > > + pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, > +conn_state->max_requested_bpc); This seems to be wrong as it unconditionally overwrites the non-compress case. > + > if (intel_dp->force_dsc_bpc) { > pipe_bpp = intel_dp->force_dsc_bpc * 3; > drm_dbg_kms(&dev_priv->drm, "Input DSC BPP forced to %d", > pipe_bpp); > -- > 2.25.1
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index cb4fbcd935db..73a7baccd7d0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1494,6 +1494,31 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder, return drm_dsc_compute_rc_parameters(vdsc_cfg); } +static bool intel_dp_dsc_supports_format(struct intel_dp *intel_dp, + enum intel_output_format output_format) +{ + u8 sink_dsc_format; + + switch (output_format) { + case INTEL_OUTPUT_FORMAT_RGB: + sink_dsc_format = DP_DSC_RGB; + break; + case INTEL_OUTPUT_FORMAT_YCBCR444: + sink_dsc_format = DP_DSC_YCbCr444; + break; + case INTEL_OUTPUT_FORMAT_YCBCR420: + if (min(intel_dp_source_dsc_version_minor(intel_dp), + intel_dp_sink_dsc_version_minor(intel_dp)) < 2) + return false; + sink_dsc_format = DP_DSC_YCbCr420_Native; + break; + default: + return false; + } + + return drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, sink_dsc_format); +} + int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state, @@ -1514,11 +1539,16 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, if (!intel_dp_supports_dsc(intel_dp, pipe_config)) return -EINVAL; + if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format)) + return -EINVAL; + if (compute_pipe_bpp) pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc); else pipe_bpp = pipe_config->pipe_bpp; + pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc); + if (intel_dp->force_dsc_bpc) { pipe_bpp = intel_dp->force_dsc_bpc * 3; drm_dbg_kms(&dev_priv->drm, "Input DSC BPP forced to %d", pipe_bpp);