| Message ID | 20230207140557.18164-1-swati2.sharma@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/display/selftest: Add pcode selftest | expand |
On Tue, 07 Feb 2023, Swati Sharma <swati2.sharma@intel.com> wrote: > From: Mohammed Khajapasha <mohammed.khajapasha@intel.com> > > Include pcode selftest for display to validate QGV points read. > Failure of this selftest indicates a bad firmware rather than regular > display issue. > > Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: Mohammed Khajapasha <mohammed.khajapasha@intel.com> > Signed-off-by: Swati Sharma <swati2.sharma@intel.com> > --- > drivers/gpu/drm/i915/Makefile | 3 +- > drivers/gpu/drm/i915/display/intel_bw.c | 4 ++ > .../drm/i915/display/selftests/selftest_bw.c | 54 +++++++++++++++++++ > .../i915/display/selftests/selftest_display.c | 18 +++++++ > .../i915/display/selftests/selftest_display.h | 6 +++ > .../drm/i915/selftests/i915_live_selftests.h | 1 + > 6 files changed, 85 insertions(+), 1 deletion(-) > create mode 100644 drivers/gpu/drm/i915/display/selftests/selftest_bw.c > create mode 100644 drivers/gpu/drm/i915/display/selftests/selftest_display.c > create mode 100644 drivers/gpu/drm/i915/display/selftests/selftest_display.h > > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile > index 918470a04591..aa7d34b3f71c 100644 > --- a/drivers/gpu/drm/i915/Makefile > +++ b/drivers/gpu/drm/i915/Makefile > @@ -350,7 +350,8 @@ i915-$(CONFIG_DRM_I915_SELFTEST) += \ > selftests/igt_mmap.o \ > selftests/igt_reset.o \ > selftests/igt_spinner.o \ > - selftests/librapl.o > + selftests/librapl.o \ > + display/selftests/selftest_display.o I think we'll want to start adding display selftests under a separate Kconfig, and in separate build lists. CONFIG_DRM_I915_DISPLAY_SELFTEST maybe. > > # virtual gpu code > i915-y += i915_vgpu.o > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c > index 202321ffbe2a..b0bfe04f2835 100644 > --- a/drivers/gpu/drm/i915/display/intel_bw.c > +++ b/drivers/gpu/drm/i915/display/intel_bw.c > @@ -1211,3 +1211,7 @@ int intel_bw_init(struct drm_i915_private *dev_priv) > > return 0; > } > + > +#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) > +#include "selftests/selftest_bw.c" > +#endif Why here, why bw? > diff --git a/drivers/gpu/drm/i915/display/selftests/selftest_bw.c b/drivers/gpu/drm/i915/display/selftests/selftest_bw.c > new file mode 100644 > index 000000000000..69d52201bd9b > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/selftests/selftest_bw.c bw? > @@ -0,0 +1,54 @@ > +// SPDX-License-Identifier: MIT > +/* > + * Copyright © 2020 Intel Corporation Year. > + */ > + > +#include "display/intel_bw.h" > +#include "i915_drv.h" > +#include "i915_selftest.h" > +#include "soc/intel_dram.h" > +#include "selftest_display.h" Please keep these sorted. > + > +/** > + * intel_pcode_read_qgv_points_read_test - Test QGV point reads from pcode > + * @arg: i915 device instance > + * > + * Return 0 on success and error on fail and when dclk is zero > + */ > +int intel_pcode_read_qgv_points_test(void *arg) > +{ > + struct drm_i915_private *i915 = arg; > + struct intel_qgv_info qi; > + struct intel_qgv_point qp; > + int i, ret; > + bool fail = false; > + intel_wakeref_t wakeref; > + > + if (DISPLAY_VER(i915) < 11) { > + drm_info(&i915->drm, "QGV doesn't support, skipping\n"); > + return 0; > + } > + > + with_intel_runtime_pm(i915->uncore.rpm, wakeref) > + intel_dram_detect(i915); > + > + qi.num_points = i915->dram_info.num_qgv_points; Not entirely happy about sprinkling new dram_info access outside of intel_dram.c. I'd rather we moved in the other direction. So maybe the whole thing should be in intel_dram. Which kind of makes this selftest not about display too, but rather the "soc" stuff. > + > + for (i = 0; i < qi.num_points; i++) { > + ret = intel_read_qgv_point_info(i915, &qp, i); > + if (ret) { > + drm_err(&i915->drm, "Pcode failed to read qgv point %d\n", i); > + fail = true; > + } > + > + if (qp.dclk == 0) { > + drm_err(&i915->drm, "DCLK set to 0 for qgv point %d\n", i); > + fail = true; > + } > + } > + > + if (fail) > + return -EINVAL; > + > + return 0; > +} > diff --git a/drivers/gpu/drm/i915/display/selftests/selftest_display.c b/drivers/gpu/drm/i915/display/selftests/selftest_display.c > new file mode 100644 > index 000000000000..1663c69f9ddc > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/selftests/selftest_display.c > @@ -0,0 +1,18 @@ > +// SPDX-License-Identifier: MIT > +/* > + * Copyright © 2020 Intel Corporation Year. > + */ > + > +#include "i915_drv.h" > +#include "i915_selftest.h" > + > +#include "selftest_display.h" > + > +int intel_display_live_selftests(struct drm_i915_private *i915) What's with the "live" here? > +{ > + static const struct i915_subtest tests[] = { > + SUBTEST(intel_pcode_read_qgv_points_test), > + }; > + > + return i915_subtests(tests, i915); > +} > diff --git a/drivers/gpu/drm/i915/display/selftests/selftest_display.h b/drivers/gpu/drm/i915/display/selftests/selftest_display.h > new file mode 100644 > index 000000000000..c8d80d5945bb > --- /dev/null > +++ b/drivers/gpu/drm/i915/display/selftests/selftest_display.h > @@ -0,0 +1,6 @@ > +// SPDX-License-Identifier: MIT > +/* > + * Copyright © 2020 Intel Corporation Year. > + */ > + > +int intel_pcode_read_qgv_points_test(void *arg); > diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h > index 5aee6c9a8295..8f980483cca8 100644 > --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h > +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h We probably don't want display tests in this file either. > @@ -42,6 +42,7 @@ selftest(gem_contexts, i915_gem_context_live_selftests) > selftest(client, i915_gem_client_blt_live_selftests) > selftest(gem_migrate, i915_gem_migrate_live_selftests) > selftest(reset, intel_reset_live_selftests) > +selftest(display, intel_display_live_selftests) > selftest(memory_region, intel_memory_region_live_selftests) > selftest(hangcheck, intel_hangcheck_live_selftests) > selftest(execlists, intel_execlists_live_selftests)
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 918470a04591..aa7d34b3f71c 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -350,7 +350,8 @@ i915-$(CONFIG_DRM_I915_SELFTEST) += \ selftests/igt_mmap.o \ selftests/igt_reset.o \ selftests/igt_spinner.o \ - selftests/librapl.o + selftests/librapl.o \ + display/selftests/selftest_display.o # virtual gpu code i915-y += i915_vgpu.o diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c index 202321ffbe2a..b0bfe04f2835 100644 --- a/drivers/gpu/drm/i915/display/intel_bw.c +++ b/drivers/gpu/drm/i915/display/intel_bw.c @@ -1211,3 +1211,7 @@ int intel_bw_init(struct drm_i915_private *dev_priv) return 0; } + +#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) +#include "selftests/selftest_bw.c" +#endif diff --git a/drivers/gpu/drm/i915/display/selftests/selftest_bw.c b/drivers/gpu/drm/i915/display/selftests/selftest_bw.c new file mode 100644 index 000000000000..69d52201bd9b --- /dev/null +++ b/drivers/gpu/drm/i915/display/selftests/selftest_bw.c @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2020 Intel Corporation + */ + +#include "display/intel_bw.h" +#include "i915_drv.h" +#include "i915_selftest.h" +#include "soc/intel_dram.h" +#include "selftest_display.h" + +/** + * intel_pcode_read_qgv_points_read_test - Test QGV point reads from pcode + * @arg: i915 device instance + * + * Return 0 on success and error on fail and when dclk is zero + */ +int intel_pcode_read_qgv_points_test(void *arg) +{ + struct drm_i915_private *i915 = arg; + struct intel_qgv_info qi; + struct intel_qgv_point qp; + int i, ret; + bool fail = false; + intel_wakeref_t wakeref; + + if (DISPLAY_VER(i915) < 11) { + drm_info(&i915->drm, "QGV doesn't support, skipping\n"); + return 0; + } + + with_intel_runtime_pm(i915->uncore.rpm, wakeref) + intel_dram_detect(i915); + + qi.num_points = i915->dram_info.num_qgv_points; + + for (i = 0; i < qi.num_points; i++) { + ret = intel_read_qgv_point_info(i915, &qp, i); + if (ret) { + drm_err(&i915->drm, "Pcode failed to read qgv point %d\n", i); + fail = true; + } + + if (qp.dclk == 0) { + drm_err(&i915->drm, "DCLK set to 0 for qgv point %d\n", i); + fail = true; + } + } + + if (fail) + return -EINVAL; + + return 0; +} diff --git a/drivers/gpu/drm/i915/display/selftests/selftest_display.c b/drivers/gpu/drm/i915/display/selftests/selftest_display.c new file mode 100644 index 000000000000..1663c69f9ddc --- /dev/null +++ b/drivers/gpu/drm/i915/display/selftests/selftest_display.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2020 Intel Corporation + */ + +#include "i915_drv.h" +#include "i915_selftest.h" + +#include "selftest_display.h" + +int intel_display_live_selftests(struct drm_i915_private *i915) +{ + static const struct i915_subtest tests[] = { + SUBTEST(intel_pcode_read_qgv_points_test), + }; + + return i915_subtests(tests, i915); +} diff --git a/drivers/gpu/drm/i915/display/selftests/selftest_display.h b/drivers/gpu/drm/i915/display/selftests/selftest_display.h new file mode 100644 index 000000000000..c8d80d5945bb --- /dev/null +++ b/drivers/gpu/drm/i915/display/selftests/selftest_display.h @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2020 Intel Corporation + */ + +int intel_pcode_read_qgv_points_test(void *arg); diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h index 5aee6c9a8295..8f980483cca8 100644 --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h @@ -42,6 +42,7 @@ selftest(gem_contexts, i915_gem_context_live_selftests) selftest(client, i915_gem_client_blt_live_selftests) selftest(gem_migrate, i915_gem_migrate_live_selftests) selftest(reset, intel_reset_live_selftests) +selftest(display, intel_display_live_selftests) selftest(memory_region, intel_memory_region_live_selftests) selftest(hangcheck, intel_hangcheck_live_selftests) selftest(execlists, intel_execlists_live_selftests)