diff mbox series

[v9,09/14] drm/i915/dp: Check if mode can be supported with dsc compressed bpp

Message ID 20230220122401.3495507-10-ankit.k.nautiyal@intel.com (mailing list archive)
State New, archived
Headers show
Series Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes | expand

Commit Message

Nautiyal, Ankit K Feb. 20, 2023, 12:23 p.m. UTC 
Use compressed bpp to calculate mode_rate during dp_mode_valid.
Check if this can be supported with max lane count and link rate
combination.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index dfd7af97ea55..60090fbbca5f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1143,8 +1143,6 @@  intel_dp_mode_valid(struct drm_connector *_connector,
 	max_lanes = intel_dp_max_lane_count(intel_dp);
 
 	max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
-	mode_rate = intel_dp_link_required(target_clock,
-					   intel_dp_mode_min_output_bpp(connector, mode));
 
 	if (HAS_DSC(dev_priv) &&
 	    drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) {
@@ -1200,7 +1198,12 @@  intel_dp_mode_valid(struct drm_connector *_connector,
 	if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc)
 		return MODE_CLOCK_HIGH;
 
-	if (mode_rate > max_rate && !dsc)
+	if (dsc)
+		mode_rate = intel_dp_link_required(target_clock, dsc_max_output_bpp);
+	else
+		mode_rate = intel_dp_link_required(target_clock,
+						   intel_dp_mode_min_output_bpp(connector, mode));
+	if (mode_rate > max_rate)
 		return MODE_CLOCK_HIGH;
 
 	status = intel_dp_mode_valid_downstream(connector, mode, target_clock);