| Message ID | 20230313205556.1174503-1-daniele.ceraolospurio@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/huc: Cancel HuC delayed load timer on reset. | expand |
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> P.S. side note - while reviewing this, i wish we got rid of those "ops_on/off->intel_uc_funcname" macro obsfucations since i couldnt find intel_uc_sanitize but did find the direct call - so inconsistent. On Mon, 2023-03-13 at 13:55 -0700, Ceraolo Spurio, Daniele wrote: > In the rare case where we do a full GT reset after starting the HuC > load and before it completes (which basically boils down to i915 hanging > during init), we need to cancel the delayed load fence, as it will be > re-initialized in the post-reset recovery. > > Fixes: 27536e03271d ("drm/i915/huc: track delayed HuC load with a fence") > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Alan Previn <alan.previn.teres.alexis@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_huc.c | 7 +++++++ > drivers/gpu/drm/i915/gt/uc/intel_huc.h | 7 +------ > 2 files changed, 8 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c > index 72884e21470b..aefdaa62da99 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c > @@ -241,6 +241,13 @@ static void delayed_huc_load_fini(struct intel_huc *huc) > i915_sw_fence_fini(&huc->delayed_load.fence); > } > > +int intel_huc_sanitize(struct intel_huc *huc) > +{ > + delayed_huc_load_complete(huc); > + intel_uc_fw_sanitize(&huc->fw); > + return 0; > +} > + > static bool vcs_supported(struct intel_gt *gt) > { > intel_engine_mask_t mask = gt->info.engine_mask; > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h > index 52db03620c60..db555b3c1f56 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h > @@ -41,6 +41,7 @@ struct intel_huc { > } delayed_load; > }; > > +int intel_huc_sanitize(struct intel_huc *huc); > void intel_huc_init_early(struct intel_huc *huc); > int intel_huc_init(struct intel_huc *huc); > void intel_huc_fini(struct intel_huc *huc); > @@ -54,12 +55,6 @@ bool intel_huc_is_authenticated(struct intel_huc *huc); > void intel_huc_register_gsc_notifier(struct intel_huc *huc, struct bus_type *bus); > void intel_huc_unregister_gsc_notifier(struct intel_huc *huc, struct bus_type *bus); > > -static inline int intel_huc_sanitize(struct intel_huc *huc) > -{ > - intel_uc_fw_sanitize(&huc->fw); > - return 0; > -} > - > static inline bool intel_huc_is_supported(struct intel_huc *huc) > { > return intel_uc_fw_is_supported(&huc->fw);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c index 72884e21470b..aefdaa62da99 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c @@ -241,6 +241,13 @@ static void delayed_huc_load_fini(struct intel_huc *huc) i915_sw_fence_fini(&huc->delayed_load.fence); } +int intel_huc_sanitize(struct intel_huc *huc) +{ + delayed_huc_load_complete(huc); + intel_uc_fw_sanitize(&huc->fw); + return 0; +} + static bool vcs_supported(struct intel_gt *gt) { intel_engine_mask_t mask = gt->info.engine_mask; diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h index 52db03620c60..db555b3c1f56 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h @@ -41,6 +41,7 @@ struct intel_huc { } delayed_load; }; +int intel_huc_sanitize(struct intel_huc *huc); void intel_huc_init_early(struct intel_huc *huc); int intel_huc_init(struct intel_huc *huc); void intel_huc_fini(struct intel_huc *huc); @@ -54,12 +55,6 @@ bool intel_huc_is_authenticated(struct intel_huc *huc); void intel_huc_register_gsc_notifier(struct intel_huc *huc, struct bus_type *bus); void intel_huc_unregister_gsc_notifier(struct intel_huc *huc, struct bus_type *bus); -static inline int intel_huc_sanitize(struct intel_huc *huc) -{ - intel_uc_fw_sanitize(&huc->fw); - return 0; -} - static inline bool intel_huc_is_supported(struct intel_huc *huc) { return intel_uc_fw_is_supported(&huc->fw);
In the rare case where we do a full GT reset after starting the HuC load and before it completes (which basically boils down to i915 hanging during init), we need to cancel the delayed load fence, as it will be re-initialized in the post-reset recovery. Fixes: 27536e03271d ("drm/i915/huc: track delayed HuC load with a fence") Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_huc.c | 7 +++++++ drivers/gpu/drm/i915/gt/uc/intel_huc.h | 7 +------ 2 files changed, 8 insertions(+), 6 deletions(-)