diff mbox series

[19/29] drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain

Message ID 20230323142035.1432621-20-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/tc: Align the ADLP TypeC sequences with bspec | expand

Commit Message

Imre Deak March 23, 2023, 2:20 p.m. UTC 
Instead of the corresponding if ladder, add a TC PHY hook to get the
platform and TC mode specific power domain used for blocking the TC-cold
power state.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 73 ++++++++++++++++++++-----
 1 file changed, 59 insertions(+), 14 deletions(-)

Comments

Kahola, Mika March 27, 2023, 11:57 a.m. UTC | #1 
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre
> Deak
> Sent: Thursday, March 23, 2023 4:20 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 19/29] drm/i915/tc: Add TC PHY hook to get the TC-
> cold blocking power domain
> 
> Instead of the corresponding if ladder, add a TC PHY hook to get the platform
> and TC mode specific power domain used for blocking the TC-cold power state.
> 

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 73 ++++++++++++++++++++-----
>  1 file changed, 59 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 943660044e37a..e68346c5e6036 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -25,6 +25,7 @@ enum tc_port_mode {
>  struct intel_tc_port;
> 
>  struct intel_tc_phy_ops {
> +	enum intel_display_power_domain (*cold_off_domain)(struct
> +intel_tc_port *tc);
>  	u32 (*hpd_live_status)(struct intel_tc_port *tc);
>  	bool (*is_ready)(struct intel_tc_port *tc);
>  	bool (*is_owned)(struct intel_tc_port *tc); @@ -53,6 +54,8 @@ struct
> intel_tc_port {
>  	u8 phy_fia_idx;
>  };
> 
> +static enum intel_display_power_domain
> +tc_phy_cold_off_domain(struct intel_tc_port *);
>  static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);  static bool
> tc_phy_is_ready(struct intel_tc_port *tc);  static bool
> tc_phy_take_ownership(struct intel_tc_port *tc, bool take); @@ -113,20 +116,8
> @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
>  	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
>  	struct intel_tc_port *tc = to_tc_port(dig_port);
> 
> -	return (DISPLAY_VER(i915) == 11 && tc->legacy_port) ||
> -		IS_ALDERLAKE_P(i915);
> -}
> -
> -static enum intel_display_power_domain
> -tc_phy_cold_off_domain(struct intel_tc_port *tc) -{
> -	struct drm_i915_private *i915 = tc_to_i915(tc);
> -	struct intel_digital_port *dig_port = tc->dig_port;
> -
> -	if (tc->mode == TC_PORT_TBT_ALT ||
> !intel_tc_cold_requires_aux_pw(dig_port))
> -		return POWER_DOMAIN_TC_COLD_OFF;
> -
> -	return intel_display_power_legacy_aux_domain(i915, dig_port-
> >aux_ch);
> +	return tc_phy_cold_off_domain(tc) ==
> +	       intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
>  }
> 
>  static intel_wakeref_t
> @@ -334,6 +325,18 @@ static void tc_port_fixup_legacy_flag(struct
> intel_tc_port *tc,
>   * ICL TC PHY handlers
>   * -------------------
>   */
> +static enum intel_display_power_domain
> +icl_tc_phy_cold_off_domain(struct intel_tc_port *tc) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
> +
> +	if (tc->legacy_port)
> +		return intel_display_power_legacy_aux_domain(i915, dig_port-
> >aux_ch);
> +
> +	return POWER_DOMAIN_TC_COLD_OFF;
> +}
> +
>  static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc); @@ -540,6 +543,27
> @@ static void icl_tc_phy_disconnect(struct intel_tc_port *tc)  }
> 
>  static const struct intel_tc_phy_ops icl_tc_phy_ops = {
> +	.cold_off_domain = icl_tc_phy_cold_off_domain,
> +	.hpd_live_status = icl_tc_phy_hpd_live_status,
> +	.is_ready = icl_tc_phy_is_ready,
> +	.is_owned = icl_tc_phy_is_owned,
> +	.get_hw_state = icl_tc_phy_get_hw_state,
> +	.connect = icl_tc_phy_connect,
> +	.disconnect = icl_tc_phy_disconnect,
> +};
> +
> +/**
> + * TGL TC PHY handlers
> + * -------------------
> + */
> +static enum intel_display_power_domain
> +tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc) {
> +	return POWER_DOMAIN_TC_COLD_OFF;
> +}
> +
> +static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
> +	.cold_off_domain = tgl_tc_phy_cold_off_domain,
>  	.hpd_live_status = icl_tc_phy_hpd_live_status,
>  	.is_ready = icl_tc_phy_is_ready,
>  	.is_owned = icl_tc_phy_is_owned,
> @@ -552,6 +576,18 @@ static const struct intel_tc_phy_ops icl_tc_phy_ops = {
>   * ADLP TC PHY handlers
>   * --------------------
>   */
> +static enum intel_display_power_domain
> +adlp_tc_phy_cold_off_domain(struct intel_tc_port *tc) {
> +	struct drm_i915_private *i915 = tc_to_i915(tc);
> +	struct intel_digital_port *dig_port = tc->dig_port;
> +
> +	if (tc->mode != TC_PORT_TBT_ALT)
> +		return intel_display_power_legacy_aux_domain(i915, dig_port-
> >aux_ch);
> +
> +	return POWER_DOMAIN_TC_COLD_OFF;
> +}
> +
>  static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc); @@ -624,6 +660,7 @@
> static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)  }
> 
>  static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
> +	.cold_off_domain = adlp_tc_phy_cold_off_domain,
>  	.hpd_live_status = adlp_tc_phy_hpd_live_status,
>  	.is_ready = adlp_tc_phy_is_ready,
>  	.is_owned = adlp_tc_phy_is_owned,
> @@ -636,6 +673,12 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops =
> {
>   * Generic TC PHY handlers
>   * -----------------------
>   */
> +static enum intel_display_power_domain
> +tc_phy_cold_off_domain(struct intel_tc_port *tc) {
> +	return tc->phy_ops->cold_off_domain(tc); }
> +
>  static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)  {
>  	struct drm_i915_private *i915 = tc_to_i915(tc); @@ -1246,6 +1289,8
> @@ int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
> 
>  	if (DISPLAY_VER(i915) >= 13)
>  		tc->phy_ops = &adlp_tc_phy_ops;
> +	else if (DISPLAY_VER(i915) >= 12)
> +		tc->phy_ops = &tgl_tc_phy_ops;
>  	else
>  		tc->phy_ops = &icl_tc_phy_ops;
> 
> --
> 2.37.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 943660044e37a..e68346c5e6036 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -25,6 +25,7 @@  enum tc_port_mode {
 struct intel_tc_port;
 
 struct intel_tc_phy_ops {
+	enum intel_display_power_domain (*cold_off_domain)(struct intel_tc_port *tc);
 	u32 (*hpd_live_status)(struct intel_tc_port *tc);
 	bool (*is_ready)(struct intel_tc_port *tc);
 	bool (*is_owned)(struct intel_tc_port *tc);
@@ -53,6 +54,8 @@  struct intel_tc_port {
 	u8 phy_fia_idx;
 };
 
+static enum intel_display_power_domain
+tc_phy_cold_off_domain(struct intel_tc_port *);
 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc);
 static bool tc_phy_is_ready(struct intel_tc_port *tc);
 static bool tc_phy_take_ownership(struct intel_tc_port *tc, bool take);
@@ -113,20 +116,8 @@  bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	struct intel_tc_port *tc = to_tc_port(dig_port);
 
-	return (DISPLAY_VER(i915) == 11 && tc->legacy_port) ||
-		IS_ALDERLAKE_P(i915);
-}
-
-static enum intel_display_power_domain
-tc_phy_cold_off_domain(struct intel_tc_port *tc)
-{
-	struct drm_i915_private *i915 = tc_to_i915(tc);
-	struct intel_digital_port *dig_port = tc->dig_port;
-
-	if (tc->mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
-		return POWER_DOMAIN_TC_COLD_OFF;
-
-	return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+	return tc_phy_cold_off_domain(tc) ==
+	       intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
 }
 
 static intel_wakeref_t
@@ -334,6 +325,18 @@  static void tc_port_fixup_legacy_flag(struct intel_tc_port *tc,
  * ICL TC PHY handlers
  * -------------------
  */
+static enum intel_display_power_domain
+icl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
+
+	if (tc->legacy_port)
+		return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+
+	return POWER_DOMAIN_TC_COLD_OFF;
+}
+
 static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
@@ -540,6 +543,27 @@  static void icl_tc_phy_disconnect(struct intel_tc_port *tc)
 }
 
 static const struct intel_tc_phy_ops icl_tc_phy_ops = {
+	.cold_off_domain = icl_tc_phy_cold_off_domain,
+	.hpd_live_status = icl_tc_phy_hpd_live_status,
+	.is_ready = icl_tc_phy_is_ready,
+	.is_owned = icl_tc_phy_is_owned,
+	.get_hw_state = icl_tc_phy_get_hw_state,
+	.connect = icl_tc_phy_connect,
+	.disconnect = icl_tc_phy_disconnect,
+};
+
+/**
+ * TGL TC PHY handlers
+ * -------------------
+ */
+static enum intel_display_power_domain
+tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
+{
+	return POWER_DOMAIN_TC_COLD_OFF;
+}
+
+static const struct intel_tc_phy_ops tgl_tc_phy_ops = {
+	.cold_off_domain = tgl_tc_phy_cold_off_domain,
 	.hpd_live_status = icl_tc_phy_hpd_live_status,
 	.is_ready = icl_tc_phy_is_ready,
 	.is_owned = icl_tc_phy_is_owned,
@@ -552,6 +576,18 @@  static const struct intel_tc_phy_ops icl_tc_phy_ops = {
  * ADLP TC PHY handlers
  * --------------------
  */
+static enum intel_display_power_domain
+adlp_tc_phy_cold_off_domain(struct intel_tc_port *tc)
+{
+	struct drm_i915_private *i915 = tc_to_i915(tc);
+	struct intel_digital_port *dig_port = tc->dig_port;
+
+	if (tc->mode != TC_PORT_TBT_ALT)
+		return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch);
+
+	return POWER_DOMAIN_TC_COLD_OFF;
+}
+
 static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
@@ -624,6 +660,7 @@  static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
 }
 
 static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
+	.cold_off_domain = adlp_tc_phy_cold_off_domain,
 	.hpd_live_status = adlp_tc_phy_hpd_live_status,
 	.is_ready = adlp_tc_phy_is_ready,
 	.is_owned = adlp_tc_phy_is_owned,
@@ -636,6 +673,12 @@  static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
  * Generic TC PHY handlers
  * -----------------------
  */
+static enum intel_display_power_domain
+tc_phy_cold_off_domain(struct intel_tc_port *tc)
+{
+	return tc->phy_ops->cold_off_domain(tc);
+}
+
 static u32 tc_phy_hpd_live_status(struct intel_tc_port *tc)
 {
 	struct drm_i915_private *i915 = tc_to_i915(tc);
@@ -1246,6 +1289,8 @@  int intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 
 	if (DISPLAY_VER(i915) >= 13)
 		tc->phy_ops = &adlp_tc_phy_ops;
+	else if (DISPLAY_VER(i915) >= 12)
+		tc->phy_ops = &tgl_tc_phy_ops;
 	else
 		tc->phy_ops = &icl_tc_phy_ops;