From patchwork Fri Mar 24 19:55:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Yacoub X-Patchwork-Id: 13187330 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 98136C6FD1C for ; Fri, 24 Mar 2023 19:56:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 234E410EC92; Fri, 24 Mar 2023 19:56:36 +0000 (UTC) Received: from mail-yw1-x112d.google.com (mail-yw1-x112d.google.com [IPv6:2607:f8b0:4864:20::112d]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7C3BC10EC95 for ; Fri, 24 Mar 2023 19:56:27 +0000 (UTC) Received: by mail-yw1-x112d.google.com with SMTP id 00721157ae682-544787916d9so51987647b3.13 for ; Fri, 24 Mar 2023 12:56:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1679687787; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lJ8XMXUhDPNrl814nUboxXrW9LkyTici68uktBtSFp8=; b=P2zFpErnEFQsp7uPKvsd3TV5DcP5rEYW4cUIR/DZg2F7Bjo6Fuo7TB81xa4HUve9mN f83wkGhGCLXt8pH/1NA9mpjGLxNwwWWLuHuVctnuEOdYIwAA+YedxbsIijurA1cI4QmS 6AA07fYrVRdkiyJ5UKRqq7ba8hcI44Krtm/Ys= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679687787; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lJ8XMXUhDPNrl814nUboxXrW9LkyTici68uktBtSFp8=; b=RpTCv5cxeeUL7/DetWI9O30WwW6prM4dFTJ/67ZVGR/VCo52Lac/kXxwKcLOoDL128 51oiHNXBhVo7Qb210TIbBkV2s8lafg1KkWP+KNqPyoKDoGAFb0PaMlCKcNTTgbh0upP0 5q8BOF0os0J5rJi02isSzAjyYOh87ZumA0DUMrlv9f5fnVnkmq/uWclxOzHSwTRw6FDp mdCfoa4trzvAiT6HPCin43xLii1edV30/dOx8ZJPW8oOx9R4BI1gGTkt4/XGk8RFrH39 QBmaDVADJPfbSH3HQAS9o3+neK6RATU7b16vp/dgTdK2aFH8+blBlwTGTExVBkVh9eyW vmQA== X-Gm-Message-State: AAQBX9dK9wvClylSCqv+CfjrnAMlUK9O1o2Bi2iwu4c4pZHCNZ81kkE4 3Y5KemKzfwQiMNLwqMacUCNz9g== X-Google-Smtp-Source: AKy350btG7JZAXhOS+MiHIcxvyNWthfjiPWQRq04uR4hey+5zvIW3E5kjhsx4yNIl9eMj7A92K+cIQ== X-Received: by 2002:a0d:e80d:0:b0:541:a219:2b61 with SMTP id r13-20020a0de80d000000b00541a2192b61mr3298134ywe.35.1679687787185; Fri, 24 Mar 2023 12:56:27 -0700 (PDT) Received: from localhost ([2620:0:1035:15:5509:ec45:2b32:b39f]) by smtp.gmail.com with UTF8SMTPSA id o19-20020a81ef13000000b00545a0818500sm579522ywm.144.2023.03.24.12.56.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Mar 2023 12:56:26 -0700 (PDT) From: Mark Yacoub X-Google-Original-From: Mark Yacoub To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh Date: Fri, 24 Mar 2023 15:55:52 -0400 Message-Id: <20230324195555.3921170-9-markyacoub@google.com> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230324195555.3921170-1-markyacoub@google.com> References: <20230324195555.3921170-1-markyacoub@google.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v7 08/10] dt-bindings: msm/dp: Add bindings for HDCP registers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , devicetree@vger.kernel.org, Mark Yacoub , intel-gfx@lists.freedesktop.org, dianders@chromium.org, dri-devel@lists.freedesktop.org, Stephen Boyd , seanpaul@chromium.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul Add the bindings for the MSM DisplayPort HDCP registers which are required to write the HDCP key into the display controller as well as the registers to enable HDCP authentication/key exchange/encryption. Cc: Rob Herring Cc: Stephen Boyd Reviewed-by: Rob Herring Signed-off-by: Sean Paul Signed-off-by: Mark Yacoub Reviewed-by: Douglas Anderson --- Changes in v2: -Drop register range names (Stephen) -Fix yaml errors (Rob) Changes in v3: -Add new compatible string for dp-hdcp -Add descriptions to reg -Add minItems/maxItems to reg -Make reg depend on the new hdcp compatible string Changes in v4: -Rebase on Bjorn's multi-dp patchset Changes in v4.5: -Remove maxItems from reg (Rob) -Remove leading zeros in example (Rob) Changes in v5: -None Changes in v6: -Rebased: modify minItems instead of adding it as new line. Changes in v7: -Revert the change to minItems -Added the maxItems to Reg .../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 774ccb5184b88..c47ade3a4ae17 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -31,6 +31,8 @@ properties: - description: link register block - description: p0 register block - description: p1 register block + - description: (Optional) Registers for HDCP device key injection + - description: (Optional) Registers for HDCP TrustZone interaction interrupts: maxItems: 1 @@ -158,6 +160,7 @@ allOf: aux-bus: false reg: minItems: 5 + maxItems: 7 required: - "#sound-dai-cells" @@ -175,7 +178,9 @@ examples: <0xae90200 0x200>, <0xae90400 0xc00>, <0xae91000 0x400>, - <0xae91400 0x400>; + <0xae91400 0x400>, + <0xaed1000 0x174>, + <0xaee1000 0x2c>; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,