Message ID | 20230425105450.18441-4-ville.syrjala@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/dsi: ICL+ DSI modeset sequence fixes | expand |
On Tue, 25 Apr 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Windows doesn't try any tricks to optimize out the DSI panel power > delays. Let's follow suit since anything else is entirely untested > behaviour. Why would the VBT even specify a power on delay if we're > not supposed to use it? > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Redundant after c8c2969bfcba ("drm/i915/dsi: Use unconditional msleep() instead of intel_dsi_msleep()"). > --- > drivers/gpu/drm/i915/display/icl_dsi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c > index 97b889f2b0e2..b35b69227e6f 100644 > --- a/drivers/gpu/drm/i915/display/icl_dsi.c > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c > @@ -1152,7 +1152,7 @@ static void gen11_dsi_pre_pll_enable(struct intel_atomic_state *state, > struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); > > intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON); > - intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay); > + msleep(intel_dsi->panel_on_delay); > intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); > > /* step2: enable IO power */
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 97b889f2b0e2..b35b69227e6f 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -1152,7 +1152,7 @@ static void gen11_dsi_pre_pll_enable(struct intel_atomic_state *state, struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON); - intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay); + msleep(intel_dsi->panel_on_delay); intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); /* step2: enable IO power */