| Message ID | 20230426003942.1924347-1-vinay.belgaumkar@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v6,1/2] drm/i915/guc/slpc: Provide sysfs for efficient freq | expand |
On 4/25/2023 6:40 PM, Patchwork wrote: > Project List - Patchwork *Patch Details* > *Series:* series starting with [v6,1/2] drm/i915/guc/slpc: Provide > sysfs for efficient freq > *URL:* https://patchwork.freedesktop.org/series/116957/ > *State:* failure > *Details:* > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/index.html > > > CI Bug Log - changes from CI_DRM_13062 -> Patchwork_116957v1 > > > Summary > > *FAILURE* > > Serious unknown changes coming with Patchwork_116957v1 absolutely need > to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_116957v1, please notify your bug team to allow > them > to document this new failure mode, which will reduce false positives > in CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/index.html > > > Participating hosts (39 -> 36) > > Missing (3): fi-kbl-soraka bat-mtlp-8 fi-snb-2520m > > > Possible new issues > > Here are the unknown changes that may have been introduced in > Patchwork_116957v1: > > > IGT changes > > > Possible regressions > > * > > igt@i915_pm_rps@basic-api: > > o > > bat-adlp-9: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-adlp-9/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-adlp-9/igt@i915_pm_rps@basic-api.html> > > o > > bat-adlp-6: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-adlp-6/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-adlp-6/igt@i915_pm_rps@basic-api.html> > > o > > bat-atsm-1: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-atsm-1/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-atsm-1/igt@i915_pm_rps@basic-api.html> > > o > > bat-adlm-1: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-adlm-1/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-adlm-1/igt@i915_pm_rps@basic-api.html> > i915_pm_rps@basic-api is supposed to skip on GuC enabled platforms. Another series - https://patchwork.freedesktop.org/series/115698/ will fix this and ensure the skip actually happens. Thanks, Vinay. > * > o > > > Known issues > > Here are the changes found in Patchwork_116957v1 that come from known > issues: > > > IGT changes > > > Issues hit > > * > > igt@i915_pm_rps@basic-api: > > o > > bat-dg1-7: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-dg1-7/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-dg1-7/igt@i915_pm_rps@basic-api.html> > (i915#8308 <https://gitlab.freedesktop.org/drm/intel/issues/8308>) > > o > > bat-rplp-1: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-rplp-1/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-rplp-1/igt@i915_pm_rps@basic-api.html> > (i915#8308 <https://gitlab.freedesktop.org/drm/intel/issues/8308>) > > o > > bat-dg1-5: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-dg1-5/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-dg1-5/igt@i915_pm_rps@basic-api.html> > (i915#8308 <https://gitlab.freedesktop.org/drm/intel/issues/8308>) > > o > > bat-dg2-9: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-dg2-9/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-dg2-9/igt@i915_pm_rps@basic-api.html> > (i915#8308 <https://gitlab.freedesktop.org/drm/intel/issues/8308>) > > o > > bat-adln-1: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-adln-1/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-adln-1/igt@i915_pm_rps@basic-api.html> > (i915#8308 <https://gitlab.freedesktop.org/drm/intel/issues/8308>) > > o > > bat-dg2-8: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-dg2-8/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-dg2-8/igt@i915_pm_rps@basic-api.html> > (i915#8308 <https://gitlab.freedesktop.org/drm/intel/issues/8308>) > > o > > bat-rpls-1: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-rpls-1/igt@i915_pm_rps@basic-api.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-rpls-1/igt@i915_pm_rps@basic-api.html> > (i915#8308 <https://gitlab.freedesktop.org/drm/intel/issues/8308>) > > * > > igt@i915_selftest@live@migrate: > > o bat-atsm-1: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-atsm-1/igt@i915_selftest@live@migrate.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-atsm-1/igt@i915_selftest@live@migrate.html> > (i915#6268 <https://gitlab.freedesktop.org/drm/intel/issues/6268>) > * > > igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1: > > o bat-dg2-8: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html> > (i915#7932 > <https://gitlab.freedesktop.org/drm/intel/issues/7932>) +1 > similar issue > * > > igt@kms_pipe_crc_basic@read-crc: > > o bat-dg2-11: NOTRUN -> SKIP > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-dg2-11/igt@kms_pipe_crc_basic@read-crc.html> > (i915#5354 > <https://gitlab.freedesktop.org/drm/intel/issues/5354>) +1 > similar issue > > > Possible fixes > > * igt@i915_selftest@live@slpc: > o bat-adln-1: FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13062/bat-adln-1/igt@i915_selftest@live@slpc.html> > -> PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v1/bat-adln-1/igt@i915_selftest@live@slpc.html> > > > Build changes > > * Linux: CI_DRM_13062 -> Patchwork_116957v1 > > CI-20190529: 20190529 > CI_DRM_13062: 5a0333cf630a335d7e8f60fd2b8526ed0895900c @ > git://anongit.freedesktop.org/gfx-ci/linux > IGT_7270: 3bd8bf9bca97bbfb7b4b408f9fccd0cf6f742d4c @ > https://gitlab.freedesktop.org/drm/igt-gpu-tools.git > Patchwork_116957v1: 5a0333cf630a335d7e8f60fd2b8526ed0895900c @ > git://anongit.freedesktop.org/gfx-ci/linux > > > Linux commits > > 0c684b06550f drm/i915/selftest: Update the SLPC selftest > 8e7da3d2e93d drm/i915/guc/slpc: Provide sysfs for efficient freq >
On 4/26/2023 6:13 PM, Patchwork wrote: > Project List - Patchwork *Patch Details* > *Series:* series starting with [v6,1/2] drm/i915/guc/slpc: Provide > sysfs for efficient freq (rev2) > *URL:* https://patchwork.freedesktop.org/series/116957/ > *State:* failure > *Details:* > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v2/index.html > > > CI Bug Log - changes from CI_DRM_13066 -> Patchwork_116957v2 > > > Summary > > *FAILURE* > > Serious unknown changes coming with Patchwork_116957v2 absolutely need > to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_116957v2, please notify your bug team to allow > them > to document this new failure mode, which will reduce false positives > in CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v2/index.html > > > Participating hosts (40 -> 38) > > Missing (2): bat-rpls-2 fi-snb-2520m > > > Possible new issues > > Here are the unknown changes that may have been introduced in > Patchwork_116957v2: > > > IGT changes > > > Possible regressions > > * igt@gem_exec_suspend@basic-s3@smem: > o bat-rpls-1: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13066/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html> > -> ABORT > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v2/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html> > Failure has nothing to do with this patch series. > > * > > > Suppressed > > The following results come from untrusted machines, tests, or statuses. > They do not affect the overall result. > > * igt@i915_selftest@live@gt_heartbeat: > o {bat-kbl-2}: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13066/bat-kbl-2/igt@i915_selftest@live@gt_heartbeat.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v2/bat-kbl-2/igt@i915_selftest@live@gt_heartbeat.html> > This as well. Thanks, Vinay. > * > > > Known issues > > Here are the changes found in Patchwork_116957v2 that come from known > issues: > > > IGT changes > > > Issues hit > > * > > igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence: > > o bat-dg2-11: NOTRUN -> SKIP > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v2/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html> > (i915#1845 > <https://gitlab.freedesktop.org/drm/intel/issues/1845> / > i915#5354 <https://gitlab.freedesktop.org/drm/intel/issues/5354>) > * > > igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1: > > o bat-dg2-8: PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13066/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html> > -> FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html> > (i915#7932 <https://gitlab.freedesktop.org/drm/intel/issues/7932>) > > > Possible fixes > > * igt@i915_selftest@live@slpc: > o bat-adln-1: FAIL > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13066/bat-adln-1/igt@i915_selftest@live@slpc.html> > (i915#6997 > <https://gitlab.freedesktop.org/drm/intel/issues/6997>) -> > PASS > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v2/bat-adln-1/igt@i915_selftest@live@slpc.html> > > > Warnings > > * igt@i915_suspend@basic-s3-without-i915: > o fi-tgl-1115g4: INCOMPLETE > <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13066/fi-tgl-1115g4/igt@i915_suspend@basic-s3-without-i915.html> > (i915#7443 > <https://gitlab.freedesktop.org/drm/intel/issues/7443> / > i915#8102 > <https://gitlab.freedesktop.org/drm/intel/issues/8102>) -> > INCOMPLETE > <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116957v2/fi-tgl-1115g4/igt@i915_suspend@basic-s3-without-i915.html> > (i915#8102 <https://gitlab.freedesktop.org/drm/intel/issues/8102>) > > {name}: This element is suppressed. This means it is ignored when > computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > > > Build changes > > * Linux: CI_DRM_13066 -> Patchwork_116957v2 > > CI-20190529: 20190529 > CI_DRM_13066: bdd3e1a1625175c5a56bb850b986d478ea9fbf60 @ > git://anongit.freedesktop.org/gfx-ci/linux > IGT_7272: b2786c0c504bb4fa9f2dc6082fe9332223198b24 @ > https://gitlab.freedesktop.org/drm/igt-gpu-tools.git > Patchwork_116957v2: bdd3e1a1625175c5a56bb850b986d478ea9fbf60 @ > git://anongit.freedesktop.org/gfx-ci/linux > > > Linux commits > > 37444baa0ad8 drm/i915/selftest: Update the SLPC selftest > cc3e89a3db27 drm/i915/guc/slpc: Provide sysfs for efficient freq >
Hi Vinay, On Tue, Apr 25, 2023 at 05:39:41PM -0700, Vinay Belgaumkar wrote: > SLPC enables use of efficient freq at init by default. It is > possible for GuC to request frequencies that are higher than > the 'software' max if user has set it lower than the efficient > level. > > Scenarios/tests that require strict fixing of freq below the efficient > level will need to disable it through this interface. > > v2: Keep just one interface to toggle sysfs. With this, user will > be completely responsible for toggling efficient frequency if need > be. There will be no implicit disabling when user sets min < RP1 (Ashutosh) > > v3: Remove unused label, review comments (Ashutosh) > > v4: Toggle efficient freq usage in SLPC selftest and checkpatch fixes > > v5: Review comments (Andi) and add a separate patch for selftest updates > > Fixes: 95ccf312a1e4 ("drm/i915/guc/slpc: Allow SLPC to use efficient frequency") > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Andi > --- > drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 35 +++++++++++++++++ > drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 38 +++++++++++++------ > drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 1 + > .../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 1 + > 4 files changed, 64 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c > index 28f27091cd3b..ee2b44f896a2 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c > @@ -451,6 +451,33 @@ static ssize_t punit_req_freq_mhz_show(struct kobject *kobj, > return sysfs_emit(buff, "%u\n", preq); > } > > +static ssize_t slpc_ignore_eff_freq_show(struct kobject *kobj, > + struct kobj_attribute *attr, > + char *buff) > +{ > + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name); > + struct intel_guc_slpc *slpc = >->uc.guc.slpc; > + > + return sysfs_emit(buff, "%u\n", slpc->ignore_eff_freq); > +} > + > +static ssize_t slpc_ignore_eff_freq_store(struct kobject *kobj, > + struct kobj_attribute *attr, > + const char *buff, size_t count) > +{ > + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name); > + struct intel_guc_slpc *slpc = >->uc.guc.slpc; > + int err; > + u32 val; > + > + err = kstrtou32(buff, 0, &val); > + if (err) > + return err; > + > + err = intel_guc_slpc_set_ignore_eff_freq(slpc, val); > + return err ?: count; > +} > + > struct intel_gt_bool_throttle_attr { > struct attribute attr; > ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr, > @@ -663,6 +690,8 @@ static struct kobj_attribute attr_media_freq_factor_scale = > INTEL_GT_ATTR_RO(media_RP0_freq_mhz); > INTEL_GT_ATTR_RO(media_RPn_freq_mhz); > > +INTEL_GT_ATTR_RW(slpc_ignore_eff_freq); > + > static const struct attribute *media_perf_power_attrs[] = { > &attr_media_freq_factor.attr, > &attr_media_freq_factor_scale.attr, > @@ -744,6 +773,12 @@ void intel_gt_sysfs_pm_init(struct intel_gt *gt, struct kobject *kobj) > if (ret) > gt_warn(gt, "failed to create punit_req_freq_mhz sysfs (%pe)", ERR_PTR(ret)); > > + if (intel_uc_uses_guc_slpc(>->uc)) { > + ret = sysfs_create_file(kobj, &attr_slpc_ignore_eff_freq.attr); > + if (ret) > + gt_warn(gt, "failed to create ignore_eff_freq sysfs (%pe)", ERR_PTR(ret)); > + } > + > if (i915_mmio_reg_valid(intel_gt_perf_limit_reasons_reg(gt))) { > ret = sysfs_create_files(kobj, throttle_reason_attrs); > if (ret) > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > index 026d73855f36..56dbba1ef668 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c > @@ -277,6 +277,7 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) > > slpc->max_freq_softlimit = 0; > slpc->min_freq_softlimit = 0; > + slpc->ignore_eff_freq = false; > slpc->min_is_rpmax = false; > > slpc->boost_freq = 0; > @@ -457,6 +458,29 @@ int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val) > return ret; > } > > +int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bool val) > +{ > + struct drm_i915_private *i915 = slpc_to_i915(slpc); > + intel_wakeref_t wakeref; > + int ret; > + > + mutex_lock(&slpc->lock); > + wakeref = intel_runtime_pm_get(&i915->runtime_pm); > + > + ret = slpc_set_param(slpc, > + SLPC_PARAM_IGNORE_EFFICIENT_FREQUENCY, > + val); > + if (ret) > + guc_probe_error(slpc_to_guc(slpc), "Failed to set efficient freq(%d): %pe\n", > + val, ERR_PTR(ret)); > + else > + slpc->ignore_eff_freq = val; > + > + intel_runtime_pm_put(&i915->runtime_pm, wakeref); > + mutex_unlock(&slpc->lock); > + return ret; > +} > + > /** > * intel_guc_slpc_set_min_freq() - Set min frequency limit for SLPC. > * @slpc: pointer to intel_guc_slpc. > @@ -482,16 +506,6 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) > mutex_lock(&slpc->lock); > wakeref = intel_runtime_pm_get(&i915->runtime_pm); > > - /* Ignore efficient freq if lower min freq is requested */ > - ret = slpc_set_param(slpc, > - SLPC_PARAM_IGNORE_EFFICIENT_FREQUENCY, > - val < slpc->rp1_freq); > - if (ret) { > - guc_probe_error(slpc_to_guc(slpc), "Failed to toggle efficient freq: %pe\n", > - ERR_PTR(ret)); > - goto out; > - } > - > ret = slpc_set_param(slpc, > SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ, > val); > @@ -499,7 +513,6 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) > if (!ret) > slpc->min_freq_softlimit = val; > > -out: > intel_runtime_pm_put(&i915->runtime_pm, wakeref); > mutex_unlock(&slpc->lock); > > @@ -752,6 +765,9 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc) > /* Set cached media freq ratio mode */ > intel_guc_slpc_set_media_ratio_mode(slpc, slpc->media_ratio_mode); > > + /* Set cached value of ignore efficient freq */ > + intel_guc_slpc_set_ignore_eff_freq(slpc, slpc->ignore_eff_freq); > + > return 0; > } > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > index 17ed515f6a85..597eb5413ddf 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h > @@ -46,5 +46,6 @@ void intel_guc_slpc_boost(struct intel_guc_slpc *slpc); > void intel_guc_slpc_dec_waiters(struct intel_guc_slpc *slpc); > int intel_guc_slpc_unset_gucrc_mode(struct intel_guc_slpc *slpc); > int intel_guc_slpc_override_gucrc_mode(struct intel_guc_slpc *slpc, u32 mode); > +int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bool val); > > #endif > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > index a6ef53b04e04..a88651331497 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h > @@ -31,6 +31,7 @@ struct intel_guc_slpc { > /* frequency softlimits */ > u32 min_freq_softlimit; > u32 max_freq_softlimit; > + bool ignore_eff_freq; > > /* cached media ratio mode */ > u32 media_ratio_mode; > -- > 2.38.1
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c index 28f27091cd3b..ee2b44f896a2 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c @@ -451,6 +451,33 @@ static ssize_t punit_req_freq_mhz_show(struct kobject *kobj, return sysfs_emit(buff, "%u\n", preq); } +static ssize_t slpc_ignore_eff_freq_show(struct kobject *kobj, + struct kobj_attribute *attr, + char *buff) +{ + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name); + struct intel_guc_slpc *slpc = >->uc.guc.slpc; + + return sysfs_emit(buff, "%u\n", slpc->ignore_eff_freq); +} + +static ssize_t slpc_ignore_eff_freq_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buff, size_t count) +{ + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(kobj, attr->attr.name); + struct intel_guc_slpc *slpc = >->uc.guc.slpc; + int err; + u32 val; + + err = kstrtou32(buff, 0, &val); + if (err) + return err; + + err = intel_guc_slpc_set_ignore_eff_freq(slpc, val); + return err ?: count; +} + struct intel_gt_bool_throttle_attr { struct attribute attr; ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr, @@ -663,6 +690,8 @@ static struct kobj_attribute attr_media_freq_factor_scale = INTEL_GT_ATTR_RO(media_RP0_freq_mhz); INTEL_GT_ATTR_RO(media_RPn_freq_mhz); +INTEL_GT_ATTR_RW(slpc_ignore_eff_freq); + static const struct attribute *media_perf_power_attrs[] = { &attr_media_freq_factor.attr, &attr_media_freq_factor_scale.attr, @@ -744,6 +773,12 @@ void intel_gt_sysfs_pm_init(struct intel_gt *gt, struct kobject *kobj) if (ret) gt_warn(gt, "failed to create punit_req_freq_mhz sysfs (%pe)", ERR_PTR(ret)); + if (intel_uc_uses_guc_slpc(>->uc)) { + ret = sysfs_create_file(kobj, &attr_slpc_ignore_eff_freq.attr); + if (ret) + gt_warn(gt, "failed to create ignore_eff_freq sysfs (%pe)", ERR_PTR(ret)); + } + if (i915_mmio_reg_valid(intel_gt_perf_limit_reasons_reg(gt))) { ret = sysfs_create_files(kobj, throttle_reason_attrs); if (ret) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index 026d73855f36..56dbba1ef668 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -277,6 +277,7 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc) slpc->max_freq_softlimit = 0; slpc->min_freq_softlimit = 0; + slpc->ignore_eff_freq = false; slpc->min_is_rpmax = false; slpc->boost_freq = 0; @@ -457,6 +458,29 @@ int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val) return ret; } +int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bool val) +{ + struct drm_i915_private *i915 = slpc_to_i915(slpc); + intel_wakeref_t wakeref; + int ret; + + mutex_lock(&slpc->lock); + wakeref = intel_runtime_pm_get(&i915->runtime_pm); + + ret = slpc_set_param(slpc, + SLPC_PARAM_IGNORE_EFFICIENT_FREQUENCY, + val); + if (ret) + guc_probe_error(slpc_to_guc(slpc), "Failed to set efficient freq(%d): %pe\n", + val, ERR_PTR(ret)); + else + slpc->ignore_eff_freq = val; + + intel_runtime_pm_put(&i915->runtime_pm, wakeref); + mutex_unlock(&slpc->lock); + return ret; +} + /** * intel_guc_slpc_set_min_freq() - Set min frequency limit for SLPC. * @slpc: pointer to intel_guc_slpc. @@ -482,16 +506,6 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) mutex_lock(&slpc->lock); wakeref = intel_runtime_pm_get(&i915->runtime_pm); - /* Ignore efficient freq if lower min freq is requested */ - ret = slpc_set_param(slpc, - SLPC_PARAM_IGNORE_EFFICIENT_FREQUENCY, - val < slpc->rp1_freq); - if (ret) { - guc_probe_error(slpc_to_guc(slpc), "Failed to toggle efficient freq: %pe\n", - ERR_PTR(ret)); - goto out; - } - ret = slpc_set_param(slpc, SLPC_PARAM_GLOBAL_MIN_GT_UNSLICE_FREQ_MHZ, val); @@ -499,7 +513,6 @@ int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val) if (!ret) slpc->min_freq_softlimit = val; -out: intel_runtime_pm_put(&i915->runtime_pm, wakeref); mutex_unlock(&slpc->lock); @@ -752,6 +765,9 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc) /* Set cached media freq ratio mode */ intel_guc_slpc_set_media_ratio_mode(slpc, slpc->media_ratio_mode); + /* Set cached value of ignore efficient freq */ + intel_guc_slpc_set_ignore_eff_freq(slpc, slpc->ignore_eff_freq); + return 0; } diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h index 17ed515f6a85..597eb5413ddf 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h @@ -46,5 +46,6 @@ void intel_guc_slpc_boost(struct intel_guc_slpc *slpc); void intel_guc_slpc_dec_waiters(struct intel_guc_slpc *slpc); int intel_guc_slpc_unset_gucrc_mode(struct intel_guc_slpc *slpc); int intel_guc_slpc_override_gucrc_mode(struct intel_guc_slpc *slpc, u32 mode); +int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bool val); #endif diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h index a6ef53b04e04..a88651331497 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h @@ -31,6 +31,7 @@ struct intel_guc_slpc { /* frequency softlimits */ u32 min_freq_softlimit; u32 max_freq_softlimit; + bool ignore_eff_freq; /* cached media ratio mode */ u32 media_ratio_mode;
SLPC enables use of efficient freq at init by default. It is possible for GuC to request frequencies that are higher than the 'software' max if user has set it lower than the efficient level. Scenarios/tests that require strict fixing of freq below the efficient level will need to disable it through this interface. v2: Keep just one interface to toggle sysfs. With this, user will be completely responsible for toggling efficient frequency if need be. There will be no implicit disabling when user sets min < RP1 (Ashutosh) v3: Remove unused label, review comments (Ashutosh) v4: Toggle efficient freq usage in SLPC selftest and checkpatch fixes v5: Review comments (Andi) and add a separate patch for selftest updates Fixes: 95ccf312a1e4 ("drm/i915/guc/slpc: Allow SLPC to use efficient frequency") Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> --- drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 35 +++++++++++++++++ drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 38 +++++++++++++------ drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 1 + .../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 1 + 4 files changed, 64 insertions(+), 11 deletions(-)