From patchwork Fri May 12 06:24:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13238736 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 01209C7EE23 for ; Fri, 12 May 2023 06:29:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BEE7710E634; Fri, 12 May 2023 06:29:11 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 29BBF10E62F; Fri, 12 May 2023 06:29:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1683872947; x=1715408947; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oH+wkAeifPINlzniI5Tjkpl4lKBIqdYSa3tIN5j54fY=; b=VhWww7pGPfb0aLO5uifbHQTKU5idSehhsoPMsfO4E/r6l5zbJn+F/Dkb wOhVnTc4GpzgxyGwzWXLcerWhTvTEJxTpmyaPzyq4EaPG1dvxhsWyqy6p W7l3Tmuec0khMM/T+Zf8l1TL4Zd5iJoUjWzKOc77VmPt5ggrZWCnp7JeB pEBvAqhV/T/9itkqhVoUZEnvYURl0oG+Bzkoudbe8wsDoKeBN8SJ7FURp wOCz10EUeHqZ6OaFiEHd6JKnBzdncZQ00FW2/YnGOBem7rHs2aENuu0fX XG3AN2nSgyMKOUEq4UGJ7cWcDp+y3hYz26XWKX85K+zWEiHtalk1dmWSh w==; X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="350741953" X-IronPort-AV: E=Sophos;i="5.99,269,1677571200"; d="scan'208";a="350741953" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 23:29:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10707"; a="811941297" X-IronPort-AV: E=Sophos;i="5.99,269,1677571200"; d="scan'208";a="811941297" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2023 23:29:04 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Fri, 12 May 2023 11:54:11 +0530 Message-Id: <20230512062417.2584427-8-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230512062417.2584427-1-ankit.k.nautiyal@intel.com> References: <20230512062417.2584427-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 07/13] drm/display/dp: Fix the DP DSC Receiver cap size X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh. Fix the DSC RECEIVER CAP SIZE accordingly. Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT") Cc: Anusha Srivatsa Cc: Manasi Navare Cc: # v5.0+ Signed-off-by: Ankit Nautiyal --- include/drm/display/drm_dp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index b046f79f4744..e6e86a134ddd 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -1537,7 +1537,7 @@ enum drm_dp_phy { #define DP_BRANCH_OUI_HEADER_SIZE 0xc #define DP_RECEIVER_CAP_SIZE 0xf -#define DP_DSC_RECEIVER_CAP_SIZE 0xf +#define DP_DSC_RECEIVER_CAP_SIZE 0x10 /* DSC Capabilities 0x60 through 0x6F */ #define EDP_PSR_RECEIVER_CAP_SIZE 2 #define EDP_DISPLAY_CTL_CAP_SIZE 3 #define DP_LTTPR_COMMON_CAP_SIZE 8