| Message ID | 20230523101651.1282681-2-suraj.kandpal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add rc_range_params for YUV420 | expand |
On Tue, 23 May 2023, Suraj Kandpal <suraj.kandpal@intel.com> wrote: > Move rc_param calculation for native_420 into calculate_rc_parameter. Why? Please always answer the question "why" in the commit message, even if briefly. > > Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vdsc.c | 28 +++++++++++++---------- > 1 file changed, 16 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c > index bd9116d2cd76..c64a38363e02 100644 > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c > @@ -78,6 +78,22 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg) > else > vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1); > > + /* According to DSC 1.2 specs in Section 4.1 if native_420 is set: > + * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice > + * height < 8. > + * -second_line_offset_adj is 512 as shown by emperical values to yeild best chroma > + * preservation in second line. > + */ > + if (vdsc_cfg->native_420) { > + if (vdsc_cfg->slice_height >= 8) > + vdsc_cfg->second_line_bpg_offset = 12; > + else > + vdsc_cfg->second_line_bpg_offset = > + 2 * (vdsc_cfg->slice_height - 1); > + > + vdsc_cfg->second_line_offset_adj = 512; > + } > + > /* Our hw supports only 444 modes as of today */ > if (bpp >= 12) > vdsc_cfg->initial_offset = 2048; > @@ -192,24 +208,12 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) > /* > * According to DSC 1.2 specs in Section 4.1 if native_420 is set: > * -We need to double the current bpp. > - * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice > - * height < 8. > - * -second_line_offset_adj is 512 as shown by emperical values to yeild best chroma > - * preservation in second line. > * -nsl_bpg_offset is calculated as second_line_offset/slice_height -1 then rounded > * up to 16 fractional bits, we left shift second line offset by 11 to preserve 11 > * fractional bits. > */ > if (vdsc_cfg->native_420) { > vdsc_cfg->bits_per_pixel <<= 1; > - > - if (vdsc_cfg->slice_height >= 8) > - vdsc_cfg->second_line_bpg_offset = 12; > - else > - vdsc_cfg->second_line_bpg_offset = > - 2 * (vdsc_cfg->slice_height - 1); > - > - vdsc_cfg->second_line_offset_adj = 512; > vdsc_cfg->nsl_bpg_offset = DIV_ROUND_UP(vdsc_cfg->second_line_bpg_offset << 11, > vdsc_cfg->slice_height - 1); > }
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c index bd9116d2cd76..c64a38363e02 100644 --- a/drivers/gpu/drm/i915/display/intel_vdsc.c +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c @@ -78,6 +78,22 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg) else vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1); + /* According to DSC 1.2 specs in Section 4.1 if native_420 is set: + * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice + * height < 8. + * -second_line_offset_adj is 512 as shown by emperical values to yeild best chroma + * preservation in second line. + */ + if (vdsc_cfg->native_420) { + if (vdsc_cfg->slice_height >= 8) + vdsc_cfg->second_line_bpg_offset = 12; + else + vdsc_cfg->second_line_bpg_offset = + 2 * (vdsc_cfg->slice_height - 1); + + vdsc_cfg->second_line_offset_adj = 512; + } + /* Our hw supports only 444 modes as of today */ if (bpp >= 12) vdsc_cfg->initial_offset = 2048; @@ -192,24 +208,12 @@ int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) /* * According to DSC 1.2 specs in Section 4.1 if native_420 is set: * -We need to double the current bpp. - * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice - * height < 8. - * -second_line_offset_adj is 512 as shown by emperical values to yeild best chroma - * preservation in second line. * -nsl_bpg_offset is calculated as second_line_offset/slice_height -1 then rounded * up to 16 fractional bits, we left shift second line offset by 11 to preserve 11 * fractional bits. */ if (vdsc_cfg->native_420) { vdsc_cfg->bits_per_pixel <<= 1; - - if (vdsc_cfg->slice_height >= 8) - vdsc_cfg->second_line_bpg_offset = 12; - else - vdsc_cfg->second_line_bpg_offset = - 2 * (vdsc_cfg->slice_height - 1); - - vdsc_cfg->second_line_offset_adj = 512; vdsc_cfg->nsl_bpg_offset = DIV_ROUND_UP(vdsc_cfg->second_line_bpg_offset << 11, vdsc_cfg->slice_height - 1); }
Move rc_param calculation for native_420 into calculate_rc_parameter. Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> --- drivers/gpu/drm/i915/display/intel_vdsc.c | 28 +++++++++++++---------- 1 file changed, 16 insertions(+), 12 deletions(-)