From patchwork Wed May 24 14:22:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13254072 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BDCAEC7EE2C for ; Wed, 24 May 2023 14:27:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D8BCE10E686; Wed, 24 May 2023 14:27:00 +0000 (UTC) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id BC86110E2D2; Wed, 24 May 2023 14:26:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684938410; x=1716474410; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oH+wkAeifPINlzniI5Tjkpl4lKBIqdYSa3tIN5j54fY=; b=B1S/4pDJ0IBKe7jrw+V+WtKxRO1Ex2VmpviZKK7dWGhntxuQF0hhgmq3 0RMFaUNWCph6onDV2pxM23qVGU7DL8dLothqiS2MKYFZBF5v+hjhu/+d7 UqzlmEeLI+IDcdSp6i03dm1TZ9jpU+ZT31gF8GRqQuVRFmviScfrOLx53 INNOyRNHOTEn4AjZrv4FR6q+wSILeKbPbKj8ywWGGytAXQBQgyV3vV5Wn puUO3q97HhQF1DOKK36gCyYnfK7vEXsK3YrdLTcPGhLbnuvKmK4OrvjD+ EbEj4eKEC/F5k+b3S+/MFilqjIYXhpUjbg6TyxBRHNi63zZeeUay2w3Nh A==; X-IronPort-AV: E=McAfee;i="6600,9927,10720"; a="356806425" X-IronPort-AV: E=Sophos;i="6.00,189,1681196400"; d="scan'208";a="356806425" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2023 07:26:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10720"; a="1034556039" X-IronPort-AV: E=Sophos;i="6.00,189,1681196400"; d="scan'208";a="1034556039" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 May 2023 07:26:48 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Wed, 24 May 2023 19:52:04 +0530 Message-Id: <20230524142210.3779331-9-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230524142210.3779331-1-ankit.k.nautiyal@intel.com> References: <20230524142210.3779331-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 08/14] drm/display/dp: Fix the DP DSC Receiver cap size X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" DP DSC Receiver Capabilities are exposed via DPCD 60h-6Fh. Fix the DSC RECEIVER CAP SIZE accordingly. Fixes: ffddc4363c28 ("drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT") Cc: Anusha Srivatsa Cc: Manasi Navare Cc: # v5.0+ Signed-off-by: Ankit Nautiyal --- include/drm/display/drm_dp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index b046f79f4744..e6e86a134ddd 100644 --- a/include/drm/display/drm_dp.h +++ b/include/drm/display/drm_dp.h @@ -1537,7 +1537,7 @@ enum drm_dp_phy { #define DP_BRANCH_OUI_HEADER_SIZE 0xc #define DP_RECEIVER_CAP_SIZE 0xf -#define DP_DSC_RECEIVER_CAP_SIZE 0xf +#define DP_DSC_RECEIVER_CAP_SIZE 0x10 /* DSC Capabilities 0x60 through 0x6F */ #define EDP_PSR_RECEIVER_CAP_SIZE 2 #define EDP_DISPLAY_CTL_CAP_SIZE 3 #define DP_LTTPR_COMMON_CAP_SIZE 8