diff mbox series

[v2] drm/i915/gsc: take a wakeref for the proxy-init-completion check

Message ID 20230608230716.3079594-1-alan.previn.teres.alexis@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2] drm/i915/gsc: take a wakeref for the proxy-init-completion check | expand

Commit Message

Teres Alexis, Alan Previn June 8, 2023, 11:07 p.m. UTC
Ensure intel_gsc_uc_fw_init_done and intel_gsc_uc_fw_proxy_init
takes a wakeref before reading GSC Shim registers.

NOTE: another patch in review also adds a call from selftest to
this same function. (https://patchwork.freedesktop.org/series/117713/)
which is why i am adding the wakeref inside the callee, not the
caller.

v2: - add a helper, 'gsc_uc_get_fw_status' for both callers
      (Daniele Ceraolo)

Fixes: 99afb7cc8c44 ("drm/i915/pxp: Add ARB session creation and cleanup")
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)


base-commit: 27187d09511e1d47dbaaf91c7332319551a8edab

Comments

Daniele Ceraolo Spurio June 9, 2023, 4:50 p.m. UTC | #1
On 6/8/2023 4:07 PM, Alan Previn wrote:
> Ensure intel_gsc_uc_fw_init_done and intel_gsc_uc_fw_proxy_init
> takes a wakeref before reading GSC Shim registers.
>
> NOTE: another patch in review also adds a call from selftest to
> this same function. (https://patchwork.freedesktop.org/series/117713/)
> which is why i am adding the wakeref inside the callee, not the
> caller.
>
> v2: - add a helper, 'gsc_uc_get_fw_status' for both callers
>        (Daniele Ceraolo)
>
> Fixes: 99afb7cc8c44 ("drm/i915/pxp: Add ARB session creation and cleanup")
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> ---
>   drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 22 ++++++++++++++--------
>   1 file changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index f46eb17a7a98..60e9c6c9e775 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -24,21 +24,27 @@ static bool gsc_is_in_reset(struct intel_uncore *uncore)
>   	       GSC_FW_CURRENT_STATE_RESET;
>   }
>   
> -bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc)
> +static u32 gsc_uc_get_fw_status(struct intel_uncore *uncore)
>   {
> -	struct intel_uncore *uncore = gsc_uc_to_gt(gsc)->uncore;
> -	u32 fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
> +	intel_wakeref_t wakeref;
> +	u32 fw_status = 0;
>   
> -	return REG_FIELD_GET(GSC_FW_CURRENT_STATE, fw_status) ==
> +	with_intel_runtime_pm(uncore->rpm, wakeref)
> +		fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
> +
> +	return fw_status;
> +}
> +
> +bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc)
> +{
> +	return REG_FIELD_GET(GSC_FW_CURRENT_STATE,
> +			     gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore)) ==
>   	       GSC_FW_PROXY_STATE_NORMAL;
>   }
>   
>   bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc)
>   {
> -	struct intel_uncore *uncore = gsc_uc_to_gt(gsc)->uncore;
> -	u32 fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
> -
> -	return fw_status & GSC_FW_INIT_COMPLETE_BIT;
> +	return gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore) & GSC_FW_INIT_COMPLETE_BIT;
>   }
>   
>   static int emit_gsc_fw_load(struct i915_request *rq, struct intel_gsc_uc *gsc)
>
> base-commit: 27187d09511e1d47dbaaf91c7332319551a8edab
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index f46eb17a7a98..60e9c6c9e775 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -24,21 +24,27 @@  static bool gsc_is_in_reset(struct intel_uncore *uncore)
 	       GSC_FW_CURRENT_STATE_RESET;
 }
 
-bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc)
+static u32 gsc_uc_get_fw_status(struct intel_uncore *uncore)
 {
-	struct intel_uncore *uncore = gsc_uc_to_gt(gsc)->uncore;
-	u32 fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
+	intel_wakeref_t wakeref;
+	u32 fw_status = 0;
 
-	return REG_FIELD_GET(GSC_FW_CURRENT_STATE, fw_status) ==
+	with_intel_runtime_pm(uncore->rpm, wakeref)
+		fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
+
+	return fw_status;
+}
+
+bool intel_gsc_uc_fw_proxy_init_done(struct intel_gsc_uc *gsc)
+{
+	return REG_FIELD_GET(GSC_FW_CURRENT_STATE,
+			     gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore)) ==
 	       GSC_FW_PROXY_STATE_NORMAL;
 }
 
 bool intel_gsc_uc_fw_init_done(struct intel_gsc_uc *gsc)
 {
-	struct intel_uncore *uncore = gsc_uc_to_gt(gsc)->uncore;
-	u32 fw_status = intel_uncore_read(uncore, GSC_FW_STATUS_REG);
-
-	return fw_status & GSC_FW_INIT_COMPLETE_BIT;
+	return gsc_uc_get_fw_status(gsc_uc_to_gt(gsc)->uncore) & GSC_FW_INIT_COMPLETE_BIT;
 }
 
 static int emit_gsc_fw_load(struct i915_request *rq, struct intel_gsc_uc *gsc)