From patchwork Sat Jun 24 17:17:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas De Marchi X-Patchwork-Id: 13291696 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0901EB64DC for ; Sat, 24 Jun 2023 17:18:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 29EDE10E1B3; Sat, 24 Jun 2023 17:18:06 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id BB88B10E009; Sat, 24 Jun 2023 17:18:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1687627080; x=1719163080; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/exRLLCCIJ+SCYmv1qZD/7JAXfhDLR/kzhGGpYwNrSQ=; b=T542cwk9og0vFXUL6YsUKFW7+2SAGkVfGrVaQXEANmdVNIksAtCPG5WM XCa2BC4nwIDSHa6nisHWZ34S1idrpNSm+nhrB+SNKE4DzS0sRDI42kZwK tLDDgvwMYmuYuagXxauZVMscg1wFJlFKIU/mfnDnI2kRoEvp6enKTujaX jZ5MfJf92CRBXIqi2tb2dufqLqebYpc0knB71jFAs7lnecblKfaB1XrLE R658n1KWjv9BscmkcvaDdKrGokTotFw7SeoOen0RJtoe4H5cx2/5UeMO2 BdRnuOZosHBXR4sFv8LvPUOFzxy0r0z6bLoGitl2a3a6jrUOnB13sxuyg A==; X-IronPort-AV: E=McAfee;i="6600,9927,10751"; a="340557478" X-IronPort-AV: E=Sophos;i="6.01,155,1684825200"; d="scan'208";a="340557478" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2023 10:18:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10751"; a="1045977430" X-IronPort-AV: E=Sophos;i="6.01,155,1684825200"; d="scan'208";a="1045977430" Received: from lucas-s2600cw.jf.intel.com ([10.165.21.196]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2023 10:18:00 -0700 From: Lucas De Marchi To: intel-gfx@lists.freedesktop.org Date: Sat, 24 Jun 2023 10:17:57 -0700 Message-Id: <20230624171757.3906095-7-lucas.demarchi@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230624171757.3906095-1-lucas.demarchi@intel.com> References: <20230624171757.3906095-1-lucas.demarchi@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 6/6] drm/i915/gt: Remove bogus comment on IVB_FBC_RT_BASE_UPPER X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi , Kenneth Graunke , Matt Roper , dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The comment on the parameter being 0 to avoid the read back doesn't apply as this is not a call to wa_mcr_add(), but rather to wa_mcr_clr_set(). So, this register is actually checked and it's according to the Bspec that the register is RW, not RO. Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 848519b58e45..5fe85fad91c1 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -666,7 +666,7 @@ static void icl_ctx_workarounds_init(struct intel_engine_cs *engine, /* Wa_1604278689:icl,ehl */ wa_write(wal, IVB_FBC_RT_BASE, 0xFFFFFFFF & ~ILK_FBC_RT_VALID); wa_write_clr_set(wal, IVB_FBC_RT_BASE_UPPER, - 0, /* write-only register; skip validation */ + 0, 0xFFFFFFFF); /* Wa_1406306137:icl,ehl */