@@ -526,8 +526,7 @@ static bool rc6_supported(struct intel_rc6 *rc6)
return false;
}
- if (IS_MTL_MEDIA_STEP(gt->i915, STEP_A0, STEP_B0) &&
- gt->type == GT_MEDIA) {
+ if (IS_MEDIA_IPVER_STEP(gt, IP_VER(13, 0), STEP_A0, STEP_B0)) {
drm_notice(&i915->drm,
"Media RC6 disabled on A step\n");
return false;
@@ -698,14 +698,16 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
GRAPHICS_VER_FULL(__gt->i915) == ipver && \
IS_GRAPHICS_STEP(__gt->i915, since, until)))
+#define IS_MEDIA_IPVER_STEP(__gt, ipver, since, until) \
+ (BUILD_BUG_ON_ZERO(ipver < IP_VER(13, 0)) + \
+ (__gt && __gt->type == GT_MEDIA && \
+ MEDIA_VER_FULL(__gt->i915) == ipver && \
+ IS_MEDIA_STEP(__gt->i915, since, until)))
+
#define IS_MTL_DISPLAY_STEP(__i915, since, until) \
(IS_METEORLAKE(__i915) && \
IS_DISPLAY_STEP(__i915, since, until))
-#define IS_MTL_MEDIA_STEP(__i915, since, until) \
- (IS_METEORLAKE(__i915) && \
- IS_MEDIA_STEP(__i915, since, until))
-
/*
* DG2 hardware steppings are a bit unusual. The hardware design was forked to
* create three variants (G10, G11, and G12) which each have distinct
@@ -4223,7 +4223,7 @@ static int read_properties_unlocked(struct i915_perf *perf,
* C6 disable in BIOS. Fail if Media C6 is enabled on steppings where OAM
* does not work as expected.
*/
- if (IS_MTL_MEDIA_STEP(props->engine->i915, STEP_A0, STEP_C0) &&
+ if (IS_MEDIA_IPVER_STEP(props->engine->gt, IP_VER(13, 0), STEP_A0, STEP_C0) &&
props->engine->oa_group->type == TYPE_OAM &&
intel_check_bios_c6_setup(&props->engine->gt->rc6)) {
drm_dbg(&perf->i915->drm,
@@ -5332,16 +5332,9 @@ int i915_perf_ioctl_version(struct drm_i915_private *i915)
* C6 disable in BIOS. If Media C6 is enabled in BIOS, return version 6
* to indicate that OA media is not supported.
*/
- if (IS_MTL_MEDIA_STEP(i915, STEP_A0, STEP_C0)) {
- struct intel_gt *gt;
- int i;
-
- for_each_gt(gt, i915, i) {
- if (gt->type == GT_MEDIA &&
- intel_check_bios_c6_setup(>->rc6))
- return 6;
- }
- }
+ if (IS_MEDIA_IPVER_STEP(i915->media_gt, IP_VER(13, 0), STEP_A0, STEP_C0) &&
+ intel_check_bios_c6_setup(&i915->media_gt->rc6))
+ return 6;
return 7;
}
Stepping-specific media behavior shouldn't be tied to MTL as a platform, but rather specifically to the Xe_LPM+ IP. Future non-MTL platforms may re-use this IP and will need to follow the exact same logic and apply the same workarounds. IS_MTL_MEDIA_STEP() is dropped in favor of a new macro IS_MEDIA_IPVER_STEP() that checks the media IP version associated with a specific IP and also ensures that we're operating on the media GT, not the primary GT. This new macro will return false if the GT is NULL (so it's safe to pass i915->media_gt as a parameter, even though that will be NULL on platforms without standalone media). We don't expect this macro to used to match media versions earlier than 13 (when media became a standalone GT), so a build error will be raised if this macro is used to match on a pre-13 version of media. That restriction can be adjusted in the future if we find a use for this macro on earlier platforms. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/gt/intel_rc6.c | 3 +-- drivers/gpu/drm/i915/i915_drv.h | 10 ++++++---- drivers/gpu/drm/i915/i915_perf.c | 15 ++++----------- 3 files changed, 11 insertions(+), 17 deletions(-)