| Message ID | 20230719132822.305612-4-luciano.coelho@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/tc: some clean-ups in max lane count handling code | expand |
Hi Luca, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Luca-Coelho/drm-i915-tc-rename-mtl_tc_port_get_pin_assignment_mask/20230719-213204 base: git://anongit.freedesktop.org/drm/drm-tip drm-tip patch link: https://lore.kernel.org/r/20230719132822.305612-4-luciano.coelho%40intel.com patch subject: [Intel-gfx] [PATCH 3/4] drm/i915/tc: move legacy code out of the main _max_lane_count() func config: x86_64-defconfig (https://download.01.org/0day-ci/archive/20230719/202307192225.QnmiapXD-lkp@intel.com/config) compiler: gcc-12 (Debian 12.2.0-14) 12.2.0 reproduce: (https://download.01.org/0day-ci/archive/20230719/202307192225.QnmiapXD-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202307192225.QnmiapXD-lkp@intel.com/ All errors (new ones prefixed by >>): drivers/gpu/drm/i915/display/intel_tc.c: In function 'intel_tc_port_fia_max_lane_count': >> drivers/gpu/drm/i915/display/intel_tc.c:354:21: error: 'struct intel_digital_port' has no member named 'tc_mode' 354 | if (dig_port->tc_mode != TC_PORT_DP_ALT) | ^~ vim +354 drivers/gpu/drm/i915/display/intel_tc.c 349 350 int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port) 351 { 352 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); 353 > 354 if (dig_port->tc_mode != TC_PORT_DP_ALT) 355 return 4; 356 357 if (DISPLAY_VER(i915) >= 14) 358 return mtl_tc_port_get_max_lane_count(dig_port); 359 360 return intel_tc_port_get_max_lane_count(dig_port); 361 } 362
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index de848b329f4b..11b6139eaf4f 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -311,13 +311,13 @@ static int mtl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port) } } -int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port) +static int intel_tc_port_get_max_lane_count(struct intel_digital_port *dig_port) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); struct intel_tc_port *tc = to_tc_port(dig_port); enum phy phy = intel_port_to_phy(i915, dig_port->base.port); intel_wakeref_t wakeref; - u32 lane_mask; + u32 lane_mask = 0; if (!intel_phy_is_tc(i915, phy) || tc->mode != TC_PORT_DP_ALT) return 4; @@ -327,7 +327,6 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port) if (DISPLAY_VER(i915) >= 14) return mtl_tc_port_get_max_lane_count(dig_port); - lane_mask = 0; with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) lane_mask = intel_tc_port_get_lane_mask(dig_port); @@ -348,6 +347,19 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port) } } +int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port) +{ + struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); + + if (dig_port->tc_mode != TC_PORT_DP_ALT) + return 4; + + if (DISPLAY_VER(i915) >= 14) + return mtl_tc_port_get_max_lane_count(dig_port); + + return intel_tc_port_get_max_lane_count(dig_port); +} + void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port, int required_lanes) {
This makes the code a bit more symmetric and readable, especially when we start adding more display version-specific alternatives. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> --- drivers/gpu/drm/i915/display/intel_tc.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-)