@@ -311,23 +311,12 @@ static int mtl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
}
}
-int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
+static int intel_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_tc_port *tc = to_tc_port(dig_port);
- enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
intel_wakeref_t wakeref;
- u32 lane_mask;
-
- if (!intel_phy_is_tc(i915, phy) || tc->mode != TC_PORT_DP_ALT)
- return 4;
+ u32 lane_mask = 0;
- assert_tc_cold_blocked(tc);
-
- if (DISPLAY_VER(i915) >= 14)
- return mtl_tc_port_get_max_lane_count(dig_port);
-
- lane_mask = 0;
with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref)
lane_mask = intel_tc_port_get_lane_mask(dig_port);
@@ -348,6 +337,23 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
}
}
+int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_tc_port *tc = to_tc_port(dig_port);
+ enum phy phy = intel_port_to_phy(i915, dig_port->base.port);
+
+ if (!intel_phy_is_tc(i915, phy) || tc->mode != TC_PORT_DP_ALT)
+ return 4;
+
+ assert_tc_cold_blocked(tc);
+
+ if (DISPLAY_VER(i915) >= 14)
+ return mtl_tc_port_get_max_lane_count(dig_port);
+
+ return intel_tc_port_get_max_lane_count(dig_port);
+}
+
void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
int required_lanes)
{
This makes the code a bit more symmetric and readable, especially when we start adding more display version-specific alternatives. Signed-off-by: Luca Coelho <luciano.coelho@intel.com> --- drivers/gpu/drm/i915/display/intel_tc.c | 32 +++++++++++++++---------- 1 file changed, 19 insertions(+), 13 deletions(-)