From patchwork Thu Aug 10 13:03:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ankit Nautiyal X-Patchwork-Id: 13349433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BAA3DC04A94 for ; Thu, 10 Aug 2023 13:08:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D1B710E52B; Thu, 10 Aug 2023 13:08:15 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 83A0710E520; Thu, 10 Aug 2023 13:08:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1691672891; x=1723208891; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=95pfhRMr6w2aaT3OenXCyMJYJDIfluYcCIiaKqFaXCM=; b=FrEau0nqp2UPc72q3mC3Ea0VWNqN8i51eokcc+12hDgzMSZ4xkg/RQZh wr7uDz+4h1cDEIu+yvG7JVISwPpBO6pXCvgEhWVgJB1fRGq4jjDPjZ2ig u+rbgPoBfGZWF6l5tRisiccvvBUmt09xAaciYcA9EGHwUF87W6GKPwyIb zeh+1AFDbPQfyqwzqa2dVcaJmRExOkunPJG8UIeY0SYBUNTVO3UBD1j8C 7eTdYcXDeqkuXq/KJa29ea6Bp3AWsE2nD0UnmA8Mf3dTYjzrztx8tHF39 LLw5/z6fKlY3Y6sqoUYbdAKj2O2RdkA8OakS/7Vz0//bB4Wofj/G9PGD2 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10797"; a="356358544" X-IronPort-AV: E=Sophos;i="6.01,162,1684825200"; d="scan'208";a="356358544" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2023 06:06:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10797"; a="709143072" X-IronPort-AV: E=Sophos;i="6.01,162,1684825200"; d="scan'208";a="709143072" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Aug 2023 06:06:50 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 10 Aug 2023 18:33:04 +0530 Message-Id: <20230810130319.3708392-6-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230810130319.3708392-1-ankit.k.nautiyal@intel.com> References: <20230810130319.3708392-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 05/20] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" In Bigjoiner check for DSC, bigjoiner interface bits for DP for DISPLAY > 13 is 36 (Bspec: 49259). v2: Corrected Display ver to 13. v3: Follow convention for conditional statement. (Ville) v4: Fix check for display ver. (Ville) v5: Added note for 2 PPC. (Stan) Signed-off-by: Ankit Nautiyal Reviewed-by: Ville Syrjälä Reviewed-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 35608b9de573..fc08fc85d665 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -802,8 +802,11 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram); if (bigjoiner) { + int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24; + /* With bigjoiner multiple dsc engines are used in parallel so PPC is 2 */ + int ppc = 2; u32 max_bpp_bigjoiner = - i915->display.cdclk.max_cdclk_freq * 48 / + i915->display.cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits / intel_dp_mode_to_fec_clock(mode_clock); bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);