diff mbox series

drm/i915/dg2: Remove Wa_15010599737

Message ID 20230814150215.873941-1-shekhar.chauhan@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/dg2: Remove Wa_15010599737 | expand

Commit Message

Chauhan, Shekhar Aug. 14, 2023, 3:02 p.m. UTC
Since this Wa is specific to DirectX, this is not required on Linux.

Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_regs.h     | 3 ---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 ---
 2 files changed, 6 deletions(-)

Comments

Matt Roper Aug. 14, 2023, 3:04 p.m. UTC | #1
On Mon, Aug 14, 2023 at 08:32:15PM +0530, Shekhar Chauhan wrote:
> Since this Wa is specific to DirectX, this is not required on Linux.
> 
> Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

Too bad the hardware teams didn't do a better job of documenting this so
that we would have known earlier.


Matt

> ---
>  drivers/gpu/drm/i915/gt/intel_gt_regs.h     | 3 ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 ---
>  2 files changed, 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index 718cb2c80f79..15b82d37486b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> @@ -412,9 +412,6 @@
>  
>  #define XEHP_CULLBIT1				MCR_REG(0x6100)
>  
> -#define CHICKEN_RASTER_1			MCR_REG(0x6204)
> -#define   DIS_SF_ROUND_NEAREST_EVEN		REG_BIT(8)
> -
>  #define CHICKEN_RASTER_2			MCR_REG(0x6208)
>  #define   TBIMR_FAST_CLIP			REG_BIT(5)
>  
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 01807a7dd2c1..5aa0d3f23c6b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -805,9 +805,6 @@ static void dg2_ctx_workarounds_init(struct intel_engine_cs *engine,
>  	    IS_DG2_G11(engine->i915) || IS_DG2_G12(engine->i915))
>  		wa_mcr_masked_en(wal, XEHP_PSS_MODE2, SCOREBOARD_STALL_FLUSH_CONTROL);
>  
> -	/* Wa_15010599737:dg2 */
> -	wa_mcr_masked_en(wal, CHICKEN_RASTER_1, DIS_SF_ROUND_NEAREST_EVEN);
> -
>  	/* Wa_18019271663:dg2 */
>  	wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
>  }
> -- 
> 2.34.1
>
Matt Roper Aug. 15, 2023, 10:41 p.m. UTC | #2
On Mon, Aug 14, 2023 at 08:04:54AM -0700, Matt Roper wrote:
> On Mon, Aug 14, 2023 at 08:32:15PM +0530, Shekhar Chauhan wrote:
> > Since this Wa is specific to DirectX, this is not required on Linux.
> > 
> > Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
> 
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> 
> Too bad the hardware teams didn't do a better job of documenting this so
> that we would have known earlier.

Applied to drm-intel-gt-next.  Thanks for the patch.


Matt

> 
> 
> Matt
> 
> > ---
> >  drivers/gpu/drm/i915/gt/intel_gt_regs.h     | 3 ---
> >  drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 ---
> >  2 files changed, 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > index 718cb2c80f79..15b82d37486b 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> > @@ -412,9 +412,6 @@
> >  
> >  #define XEHP_CULLBIT1				MCR_REG(0x6100)
> >  
> > -#define CHICKEN_RASTER_1			MCR_REG(0x6204)
> > -#define   DIS_SF_ROUND_NEAREST_EVEN		REG_BIT(8)
> > -
> >  #define CHICKEN_RASTER_2			MCR_REG(0x6208)
> >  #define   TBIMR_FAST_CLIP			REG_BIT(5)
> >  
> > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > index 01807a7dd2c1..5aa0d3f23c6b 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> > @@ -805,9 +805,6 @@ static void dg2_ctx_workarounds_init(struct intel_engine_cs *engine,
> >  	    IS_DG2_G11(engine->i915) || IS_DG2_G12(engine->i915))
> >  		wa_mcr_masked_en(wal, XEHP_PSS_MODE2, SCOREBOARD_STALL_FLUSH_CONTROL);
> >  
> > -	/* Wa_15010599737:dg2 */
> > -	wa_mcr_masked_en(wal, CHICKEN_RASTER_1, DIS_SF_ROUND_NEAREST_EVEN);
> > -
> >  	/* Wa_18019271663:dg2 */
> >  	wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
> >  }
> > -- 
> > 2.34.1
> > 
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 718cb2c80f79..15b82d37486b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -412,9 +412,6 @@ 
 
 #define XEHP_CULLBIT1				MCR_REG(0x6100)
 
-#define CHICKEN_RASTER_1			MCR_REG(0x6204)
-#define   DIS_SF_ROUND_NEAREST_EVEN		REG_BIT(8)
-
 #define CHICKEN_RASTER_2			MCR_REG(0x6208)
 #define   TBIMR_FAST_CLIP			REG_BIT(5)
 
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 01807a7dd2c1..5aa0d3f23c6b 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -805,9 +805,6 @@  static void dg2_ctx_workarounds_init(struct intel_engine_cs *engine,
 	    IS_DG2_G11(engine->i915) || IS_DG2_G12(engine->i915))
 		wa_mcr_masked_en(wal, XEHP_PSS_MODE2, SCOREBOARD_STALL_FLUSH_CONTROL);
 
-	/* Wa_15010599737:dg2 */
-	wa_mcr_masked_en(wal, CHICKEN_RASTER_1, DIS_SF_ROUND_NEAREST_EVEN);
-
 	/* Wa_18019271663:dg2 */
 	wa_masked_en(wal, CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE);
 }