Message ID | 20230822121033.597447-6-ankit.k.nautiyal@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add DSC fractional bpp support | expand |
> Add helper to get the DSC bits_per_pixel precision for the DP sink. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/display/drm_dp_helper.c | 27 > +++++++++++++++++++++++++ > include/drm/display/drm_dp_helper.h | 1 + > 2 files changed, 28 insertions(+) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c > b/drivers/gpu/drm/display/drm_dp_helper.c > index e6a78fd32380..aa8ea36211de 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, > struct drm_dp_desc *desc, } EXPORT_SYMBOL(drm_dp_read_desc); > > +/** > + * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment > + * @dsc_dpcd: DSC capabilities from DPCD > + * > + * Returns the bpp precision supported by the DP sink. > + */ > +u8 drm_dp_dsc_sink_bpp_incr(const u8 > +dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) > +{ > + u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - > +DP_DSC_SUPPORT]; > + > + switch (bpp_increment_dpcd) { > + case DP_DSC_BITS_PER_PIXEL_1_16: > + return 16; > + case DP_DSC_BITS_PER_PIXEL_1_8: > + return 8; > + case DP_DSC_BITS_PER_PIXEL_1_4: > + return 4; > + case DP_DSC_BITS_PER_PIXEL_1_2: > + return 2; > + case DP_DSC_BITS_PER_PIXEL_1_1: > + return 1; Shouldn't there be a default MISSING_CASE to throw a warning if its none of the above case Occurs in case a addition bit for step is added in dpcd going forward Regards, Suraj Kandpal > + } > + > + return 0; > +} > +EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr); > + > /** > * drm_dp_dsc_sink_max_slice_count() - Get the max slice count > * supported by the DSC sink. > diff --git a/include/drm/display/drm_dp_helper.h > b/include/drm/display/drm_dp_helper.h > index 86f24a759268..ba0514f0b032 100644 > --- a/include/drm/display/drm_dp_helper.h > +++ b/include/drm/display/drm_dp_helper.h > @@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 > dpcd[DP_RECEIVER_CAP_SIZE]) } > > /* DP/eDP DSC support */ > +u8 drm_dp_dsc_sink_bpp_incr(const u8 > +dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); > u8 drm_dp_dsc_sink_max_slice_count(const u8 > dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], > bool is_edp); > u8 drm_dp_dsc_sink_line_buf_depth(const u8 > dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); > -- > 2.40.1
> > > Add helper to get the DSC bits_per_pixel precision for the DP sink. > > > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Wouldn't we also need to send this patch to dri-devel Regards, Suraj Kandpal > > --- > > drivers/gpu/drm/display/drm_dp_helper.c | 27 > > +++++++++++++++++++++++++ > > include/drm/display/drm_dp_helper.h | 1 + > > 2 files changed, 28 insertions(+) > > > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c > > b/drivers/gpu/drm/display/drm_dp_helper.c > > index e6a78fd32380..aa8ea36211de 100644 > > --- a/drivers/gpu/drm/display/drm_dp_helper.c > > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > > @@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, > > struct drm_dp_desc *desc, } EXPORT_SYMBOL(drm_dp_read_desc); > > > > +/** > > + * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment > > + * @dsc_dpcd: DSC capabilities from DPCD > > + * > > + * Returns the bpp precision supported by the DP sink. > > + */ > > +u8 drm_dp_dsc_sink_bpp_incr(const u8 > > +dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) > > +{ > > + u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - > > +DP_DSC_SUPPORT]; > > + > > + switch (bpp_increment_dpcd) { > > + case DP_DSC_BITS_PER_PIXEL_1_16: > > + return 16; > > + case DP_DSC_BITS_PER_PIXEL_1_8: > > + return 8; > > + case DP_DSC_BITS_PER_PIXEL_1_4: > > + return 4; > > + case DP_DSC_BITS_PER_PIXEL_1_2: > > + return 2; > > + case DP_DSC_BITS_PER_PIXEL_1_1: > > + return 1; > > Shouldn't there be a default MISSING_CASE to throw a warning if its none of the > above case Occurs in case a addition bit for step is added in dpcd going forward > > Regards, > Suraj Kandpal > > > + } > > + > > + return 0; > > +} > > +EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr); > > + > > /** > > * drm_dp_dsc_sink_max_slice_count() - Get the max slice count > > * supported by the DSC sink. > > diff --git a/include/drm/display/drm_dp_helper.h > > b/include/drm/display/drm_dp_helper.h > > index 86f24a759268..ba0514f0b032 100644 > > --- a/include/drm/display/drm_dp_helper.h > > +++ b/include/drm/display/drm_dp_helper.h > > @@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 > > dpcd[DP_RECEIVER_CAP_SIZE]) } > > > > /* DP/eDP DSC support */ > > +u8 drm_dp_dsc_sink_bpp_incr(const u8 > > +dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); > > u8 drm_dp_dsc_sink_max_slice_count(const u8 > > dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], > > bool is_edp); > > u8 drm_dp_dsc_sink_line_buf_depth(const u8 > > dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); > > -- > > 2.40.1
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index e6a78fd32380..aa8ea36211de 100644 --- a/drivers/gpu/drm/display/drm_dp_helper.c +++ b/drivers/gpu/drm/display/drm_dp_helper.c @@ -2323,6 +2323,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct drm_dp_desc *desc, } EXPORT_SYMBOL(drm_dp_read_desc); +/** + * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment + * @dsc_dpcd: DSC capabilities from DPCD + * + * Returns the bpp precision supported by the DP sink. + */ +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) +{ + u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT]; + + switch (bpp_increment_dpcd) { + case DP_DSC_BITS_PER_PIXEL_1_16: + return 16; + case DP_DSC_BITS_PER_PIXEL_1_8: + return 8; + case DP_DSC_BITS_PER_PIXEL_1_4: + return 4; + case DP_DSC_BITS_PER_PIXEL_1_2: + return 2; + case DP_DSC_BITS_PER_PIXEL_1_1: + return 1; + } + + return 0; +} +EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr); + /** * drm_dp_dsc_sink_max_slice_count() - Get the max slice count * supported by the DSC sink. diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h index 86f24a759268..ba0514f0b032 100644 --- a/include/drm/display/drm_dp_helper.h +++ b/include/drm/display/drm_dp_helper.h @@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) } /* DP/eDP DSC support */ +u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]); u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], bool is_edp); u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
Add helper to get the DSC bits_per_pixel precision for the DP sink. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/display/drm_dp_helper.c | 27 +++++++++++++++++++++++++ include/drm/display/drm_dp_helper.h | 1 + 2 files changed, 28 insertions(+)