From patchwork Thu Aug 24 04:09:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 13363551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7E6BFC3DA6F for ; Thu, 24 Aug 2023 04:20:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DAB1610E488; Thu, 24 Aug 2023 04:20:48 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9DEE510E0E8 for ; Thu, 24 Aug 2023 04:20:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692850844; x=1724386844; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=th9uUyuio8zq+E7BW/qfC6t7pPzeUmvhBxuR6M7VMIQ=; b=GIK4XXl4MfyEKdgaF5WIkyFF6O76G+8DuXwNJTvmPcE4yYNE24s4vFxY ijoQcPcaVB0UEP3ZPcHaPxI17vvTNM7lPi+ICSuim2Ht/T2qORT3jvBf/ 0+sISREc6glkA/wBIEjeRsyv49ckOu2LOxMTtnNQWtzoXuPXE/b4OyI0Y fu4T5/64llg4lYgRAXMXBjcyzBj7nVBjPbVEb3EwoxuoVyULxEzD5UAjJ uQnJuzt+LisDaQ8gJcOzGy28gBWiy6VgPUyuKY+VGz6+13Da4acOpWLMb gqm/fKtblPM7FheU6/VWOdn78WQ9Yuyy6TfuXR2c3kbVFkM7kK4ImSK5b Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10811"; a="371750969" X-IronPort-AV: E=Sophos;i="6.01,195,1684825200"; d="scan'208";a="371750969" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2023 21:20:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10811"; a="730441463" X-IronPort-AV: E=Sophos;i="6.01,195,1684825200"; d="scan'208";a="730441463" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by orsmga007.jf.intel.com with ESMTP; 23 Aug 2023 21:20:42 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Thu, 24 Aug 2023 09:39:49 +0530 Message-Id: <20230824040952.186407-4-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20230824040952.186407-1-animesh.manna@intel.com> References: <20230824040952.186407-1-animesh.manna@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 3/6] drm/i915/psr: Move psr specific dpcd init into own function X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Jouni Högander This patch is preparing adding panel replay specific dpcd init. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 39 +++++++++++++----------- 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 72887c29fb51..b1c0494826f9 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -472,27 +472,22 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp) intel_dp->psr.su_y_granularity = y; } -void intel_psr_init_dpcd(struct intel_dp *intel_dp) +static void _psr_init_dpcd(struct intel_dp *intel_dp) { - struct drm_i915_private *dev_priv = + struct drm_i915_private *i915 = to_i915(dp_to_dig_port(intel_dp)->base.base.dev); - drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd, - sizeof(intel_dp->psr_dpcd)); - - if (!intel_dp->psr_dpcd[0]) - return; - drm_dbg_kms(&dev_priv->drm, "eDP panel supports PSR version %x\n", + drm_dbg_kms(&i915->drm, "eDP panel supports PSR version %x\n", intel_dp->psr_dpcd[0]); if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) { - drm_dbg_kms(&dev_priv->drm, + drm_dbg_kms(&i915->drm, "PSR support not currently available for this panel\n"); return; } if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) { - drm_dbg_kms(&dev_priv->drm, + drm_dbg_kms(&i915->drm, "Panel lacks power state control, PSR cannot be enabled\n"); return; } @@ -501,7 +496,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) intel_dp->psr.sink_sync_latency = intel_dp_get_sink_sync_latency(intel_dp); - if (DISPLAY_VER(dev_priv) >= 9 && + if (DISPLAY_VER(i915) >= 9 && (intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_IS_SUPPORTED)) { bool y_req = intel_dp->psr_dpcd[1] & DP_PSR2_SU_Y_COORDINATE_REQUIRED; @@ -519,14 +514,24 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) * GTC first. */ intel_dp->psr.sink_psr2_support = y_req && alpm; - drm_dbg_kms(&dev_priv->drm, "PSR2 %ssupported\n", + drm_dbg_kms(&i915->drm, "PSR2 %ssupported\n", intel_dp->psr.sink_psr2_support ? "" : "not "); + } +} - if (intel_dp->psr.sink_psr2_support) { - intel_dp->psr.colorimetry_support = - intel_dp_get_colorimetry_status(intel_dp); - intel_dp_get_su_granularity(intel_dp); - } +void intel_psr_init_dpcd(struct intel_dp *intel_dp) +{ + drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd, + sizeof(intel_dp->psr_dpcd)); + + if (intel_dp->psr_dpcd[0]) + _psr_init_dpcd(intel_dp); + /* TODO: Add PR case here */ + + if (intel_dp->psr.sink_psr2_support) { + intel_dp->psr.colorimetry_support = + intel_dp_get_colorimetry_status(intel_dp); + intel_dp_get_su_granularity(intel_dp); } }